Abstract
Accurate timing characterization of flip-flops is critical for robust circuit design. Conventionally, setup time and hold time are characterized independently, which results in pessimistic/optimistic designs. To reduce this pessimism/optimism, the interdependency between setup/hold-time has to be taken into account. Fast and accurate characterization of the setup/hold-time interdependency is however a challenging task. In this paper, an analytical model is proposed to capture the setup/hold-time interdependency in a conventional master-slave flip-flop. The accuracy of the proposed model is ∼10× higher than the previously published characterization methods. Furthermore, a flow is proposed to find the parameters of the model with ∼2.5× shorter computation time compared to the existing methods.
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 18th International Symposium on Quality Electronic Design, ISQED 2017 |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 209-214 |
| Number of pages | 6 |
| ISBN (Electronic) | 978-1-5090-5404-6 |
| DOIs | |
| Publication status | Published - 2 May 2017 |
| Event | 18th International Symposium on Quality Electronic Design (ISQED 2017), March 14-15, 2017, Santa Clara, California, United States - Santa Clara, United States Duration: 14 Mar 2017 → 15 Mar 2017 |
Conference
| Conference | 18th International Symposium on Quality Electronic Design (ISQED 2017), March 14-15, 2017, Santa Clara, California, United States |
|---|---|
| Country | United States |
| City | Santa Clara |
| Period | 14/03/17 → 15/03/17 |
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An analytical model for interdependent setup/hold-time characterization of flip-flops. / Balef, H.A.; Jiao, H.; de Gyvez, J.P.; Goossens, K.G.W.
Proceedings of the 18th International Symposium on Quality Electronic Design, ISQED 2017. Piscataway : Institute of Electrical and Electronics Engineers, 2017. p. 209-214 7918318.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
TY - GEN
T1 - An analytical model for interdependent setup/hold-time characterization of flip-flops
AU - Balef, H.A.
AU - Jiao, H.
AU - de Gyvez, J.P.
AU - Goossens, K.G.W.
PY - 2017/5/2
Y1 - 2017/5/2
N2 - Accurate timing characterization of flip-flops is critical for robust circuit design. Conventionally, setup time and hold time are characterized independently, which results in pessimistic/optimistic designs. To reduce this pessimism/optimism, the interdependency between setup/hold-time has to be taken into account. Fast and accurate characterization of the setup/hold-time interdependency is however a challenging task. In this paper, an analytical model is proposed to capture the setup/hold-time interdependency in a conventional master-slave flip-flop. The accuracy of the proposed model is ∼10× higher than the previously published characterization methods. Furthermore, a flow is proposed to find the parameters of the model with ∼2.5× shorter computation time compared to the existing methods.
AB - Accurate timing characterization of flip-flops is critical for robust circuit design. Conventionally, setup time and hold time are characterized independently, which results in pessimistic/optimistic designs. To reduce this pessimism/optimism, the interdependency between setup/hold-time has to be taken into account. Fast and accurate characterization of the setup/hold-time interdependency is however a challenging task. In this paper, an analytical model is proposed to capture the setup/hold-time interdependency in a conventional master-slave flip-flop. The accuracy of the proposed model is ∼10× higher than the previously published characterization methods. Furthermore, a flow is proposed to find the parameters of the model with ∼2.5× shorter computation time compared to the existing methods.
UR - http://www.scopus.com/inward/record.url?scp=85019623130&partnerID=8YFLogxK
U2 - 10.1109/ISQED.2017.7918318
DO - 10.1109/ISQED.2017.7918318
M3 - Conference contribution
AN - SCOPUS:85019623130
SP - 209
EP - 214
BT - Proceedings of the 18th International Symposium on Quality Electronic Design, ISQED 2017
PB - Institute of Electrical and Electronics Engineers
CY - Piscataway
ER -