An analytical model for interdependent setup/hold-time characterization of flip-flops

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Abstract

Accurate timing characterization of flip-flops is critical for robust circuit design. Conventionally, setup time and hold time are characterized independently, which results in pessimistic/optimistic designs. To reduce this pessimism/optimism, the interdependency between setup/hold-time has to be taken into account. Fast and accurate characterization of the setup/hold-time interdependency is however a challenging task. In this paper, an analytical model is proposed to capture the setup/hold-time interdependency in a conventional master-slave flip-flop. The accuracy of the proposed model is ∼10× higher than the previously published characterization methods. Furthermore, a flow is proposed to find the parameters of the model with ∼2.5× shorter computation time compared to the existing methods.

Original languageEnglish
Title of host publicationProceedings of the 18th International Symposium on Quality Electronic Design, ISQED 2017
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages209-214
Number of pages6
ISBN (Electronic)978-1-5090-5404-6
DOIs
Publication statusPublished - 2 May 2017
Event18th International Symposium on Quality Electronic Design (ISQED 2017), March 14-15, 2017, Santa Clara, California, United States - Santa Clara, United States
Duration: 14 Mar 201715 Mar 2017

Conference

Conference18th International Symposium on Quality Electronic Design (ISQED 2017), March 14-15, 2017, Santa Clara, California, United States
CountryUnited States
CitySanta Clara
Period14/03/1715/03/17

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