An 1mA Ultra-low Power FHSS TX Front-end Utilizing Direct-modulation with Digital Pre-distortion

E. Lopelli, J.D. Tang, van der, A.H.M. Roermund, van

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10 Citations (Scopus)
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This paper deals with the system and circuit-level aspects of an ultra-low-power robust wireless node for an asymmetric wireless link. A single building block TX front-end for a frequency hopping spread spectrum (FHSS) transmitter implemented in silicon-on-anything (SOA) bipolar technology is presented. It is realized with a directly modulated RF cascoded Colpitts power voltage-controlled oscillator (VCO), a frequency locked loop for center frequency calibration, and a digital pre-distortion algorithm for accurate frequency bins synthesis. The TX front-end draws only 1 mA at -18 dBm output power. By combining digital system techniques for frequency hopping and merging the VCO and the power amplifier (PA), a robust solution is obtained for indoor ultra-low-power wireless links. The proposed pre-distortion concept allows reduction of the hardware complexity, while the combination of a cascode output buffer and a common-collector Colpitts VCO allows us to reduce the complete FHSS front-end to a single building block that directly drives the antenna through a balun. A dedicated digital algorithm on the receiver side reduces the center frequency offset from a maximum value of 8.2 MHz to less than 8 ppm avoiding the use of any crystal on the transmitter side. Precision in the hopping synthesis is obtained by employing a ST-DFT based demodulator with differential encoding and an offset sending technique. The novel FHSS-predistortion concept has been verified by realizing a full wireless link that achieves a bit error rate better than 1.1% at -25 dBm output power while transmitting across an 8 meters indoor non-line-of-sight (NLOS) path.
Original languageEnglish
Pages (from-to)2212-2223
Number of pages13
JournalIEEE Journal of Solid-State Circuits
Issue number10
Publication statusPublished - 2007


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