aelite: A flit-synchronous network on chip with composable and predictable services

M.A. Hansson, M. Subburaman, K.G.W. Goossens

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

80 Citations (Scopus)
161 Downloads (Pure)

Abstract

To accommodate the growing number of applications integrated on a single chip, Networks on Chip (NoC) must offer scalability not only on the architectural, but also on the physical and functional level. In addition, real-time applications require Guaranteed Services (GS), with latency and throughput bounds. Traditionally, NoC architectures only deliver scalability on two of the aforementioned three levels, or do not offer GS. In this paper we present the composable and predictable aelite NoC architecture, that offers only GS, based on flit-synchronous Time Division Multiplexing (TDM). In contrast to other TDM-based NoCs, scalability on the physical level is achieved by using mesochronous or asynchronous links. Functional scalability is accomplished by completely isolating applications, and by having a router architecture that does not limit the number of service levels or connections. We demonstrate how aelite delivers the requested service to hundreds of simultaneous connections, and does so with 5 times less area compared to a state-of-the-art NoC.
Original languageEnglish
Title of host publicationProceedings of 2009 Design, Automation and Test in Europe Conference and Exhibition, DATE '09, 20 - 24 April 2009, Nice, France
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages250-255
ISBN (Print)978-1-4244-3781-8
Publication statusPublished - 2009

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