Advances in delamination modeling

Today’s microelectronic packages are typically composed of various materials, like silicon, metals, oxides, glues, and compounds (polymers). In Fig. 4.1, cross sections of a leadframe- and substrate-based package are depicted. Due to the dissimilar nature of these materials and the inherent presence of a large number of interfaces in each component, various failure modes, such as interface delamination, chip cracking, and/or solder fatigue, will occur during processing (qualification), testing, or usage. The occurring thermomechanically related failures in these components account for more than 65% of the total reliability issues.