Advances in delamination modeling

O. Sluis, van der, C.A. Yuan, W.D. Driel, van, G.Q. Zhang

Research output: Chapter in Book/Report/Conference proceedingChapterAcademic

1 Downloads (Pure)

Abstract

Today’s microelectronic packages are typically composed of various materials, like silicon, metals, oxides, glues, and compounds (polymers). In Fig. 4.1, cross sections of a leadframe- and substrate-based package are depicted. Due to the dissimilar nature of these materials and the inherent presence of a large number of interfaces in each component, various failure modes, such as interface delamination, chip cracking, and/or solder fatigue, will occur during processing (qualification), testing, or usage. The occurring thermomechanically related failures in these components account for more than 65% of the total reliability issues.
Original languageEnglish
Title of host publicationNanopackaging : nanotechnologies and electronics packaging
EditorsJ.E. Morris
Place of PublicationNew York
PublisherSpringer
Pages61-91
ISBN (Print)978-0-387-47325-3
DOIs
Publication statusPublished - 2008

Fingerprint Dive into the research topics of 'Advances in delamination modeling'. Together they form a unique fingerprint.

Cite this