In this paper we study the integration of Boron ultra-shallow junctions (USJ) obtained by Germanium pre-amorphization, Fluorine co-implantation and fast ramp-up and ramp-down anneals into advanced p-channel metal-oxide-semiconductor (PMOS) devices. Several integration issues associated to these USJ are investigated: short-channel effects control, implantation tilt angle influence, junction de-activation, thermal budget, silicide process. We show that remarkable PMOS device performance enhancement (Ion = 450 μA/μm at Ioff = 250 nA/μm for devices with Lg ≃ 50 nm) can be achieved when full potential of highly-active and abrupt USJ is exploited by combining it with a low thermal budget integration scheme and a low contact resistance NiSi.
|Number of pages||6|
|Journal||Japanese Journal of Applied Physics, Part 1 : Regular Papers and Short Notes & Review Papers|
|Issue number||4 B|
|Publication status||Published - 1 Jan 2004|
- CMOS device integration
- Ultra-shallow junctions (USJ)