Advanced gate stack, source/drain and channel engineering for Si-based CMOS 6 : new materials, processes and equipment

  • E.P. Gusev (Editor)
  • , H. Iwai (Editor)
  • , D.-L. Kwong (Editor)
  • , M. Öztürk (Editor)
  • , F. Roozeboom (Editor)
  • , P.J. Timans (Editor)
  • , V. Narayanan (Editor)

Research output: Book/ReportBook editingAcademic

Abstract

These proceedings describe processing, materials and equipment for CMOS front-end integration including gate stack, source/drain and channel engineering. Topics: strained Si/SiGe and Si/SiGe on insulator; high-mobility channels including III-Vzs, etc.; nanowires and carbon nanotubes; high-k dielectrics, metal and FUSI gate electrodes; doping/annealing for ultra-shallow junctions; low-resistivity contacts; advanced deposition (e.g. ALD, CVD, MBE), RTP, UV, plasma and laser-assisted processes.
Original languageEnglish
Place of PublicationPennington, N.J.
PublisherElectrochemical Society, Inc.
Number of pages412
ISBN (Print)978-1-56677-791-9, 978-1-60768-141-0
Publication statusPublished - 2010

Publication series

NameECS transactions
No.1
Volume28
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Bibliographical note

Vancouver, Canada, April 26-27, 2010, held as a part of the 217th meeting of the Electrochemical Society (ECS)

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