Adding synchronous and LSSD modes to asynchronous circuits

F. Beest, te; C.H. Berkel, van; A.M.G. Peeters

doi:10.1109/ASYNC.2002.1000306

Adding synchronous and LSSD modes to asynchronous circuits

F. Beest, te
, C.H. Berkel, van
, A.M.G. Peeters

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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Abstract

A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

Original language	English
Title of host publication	Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002)
Place of Publication	Los Alamitos CA
Publisher	IEEE Computer Society
Pages	161-170
ISBN (Print)	0-7695-1540-1
DOIs	https://doi.org/10.1109/ASYNC.2002.1000306
Publication status	Published - 2002

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10.1109/ASYNC.2002.1000306

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title = "Adding synchronous and LSSD modes to asynchronous circuits",

abstract = "A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.",

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year = "2002",

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Adding synchronous and LSSD modes to asynchronous circuits. / Beest, te, F.; Berkel, van, C.H.; Peeters, A.M.G.
Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002). Los Alamitos CA: IEEE Computer Society, 2002. p. 161-170.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - Adding synchronous and LSSD modes to asynchronous circuits

AU - Beest, te, F.

AU - Berkel, van, C.H.

AU - Peeters, A.M.G.

PY - 2002

Y1 - 2002

N2 - A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

AB - A synchronous mode as well as a scan mode of operation are added to a large class of asynchronous circuits, in compliance with LSSD design rides. This enables the application of mainstream tools for design-for-testability and test-pattern generation to asynchronous circuits. The approach is based on a systematic transformation of all single-output sequential gates into synchronous and scannable versions. By exploiting dynamic circuit operation in scan mode, the overhead of this transformation in terms of both circuit cost and circuit delay is kept minimal.

U2 - 10.1109/ASYNC.2002.1000306

DO - 10.1109/ASYNC.2002.1000306

M3 - Conference contribution

SN - 0-7695-1540-1

SP - 161

EP - 170

BT - Proceedings 8th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2002, Manchester, UK, April 8-11, 2002)

PB - IEEE Computer Society

CY - Los Alamitos CA

ER -

Adding synchronous and LSSD modes to asynchronous circuits

Abstract

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