Accurate thermal noise model for deep-submicron CMOS

A. J. Scholten, H. J. Tromp, L. F. Tiemeijer, R. van Langevelde, R. J. Havens, P. W.H. de Vreede, R. F.M. Roes, P. H. Woerlee, A. H. Montree, D. B.M. Klaassen

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

86 Citations (Scopus)


Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 μm down to 0.17 μm. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.

Original languageEnglish
Title of host publication1999 IEEE International Devices Meeting (IEDM)
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Number of pages4
ISBN (Print)0-7803-5410-9
Publication statusPublished - 1 Dec 1999
Externally publishedYes
Event1999 IEEE International Electron Devices Meeting, IEDM 1999 - Washington, United States
Duration: 5 Dec 19998 Dec 1999


Conference1999 IEEE International Electron Devices Meeting, IEDM 1999
Country/TerritoryUnited States


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