Accurate thermal noise model for deep-submicron CMOS

A. J. Scholten; H. J. Tromp; L. F. Tiemeijer; R. van Langevelde; R. J. Havens; P. W.H. de Vreede; R. F.M. Roes; P. H. Woerlee; A. H. Montree; D. B.M. Klaassen

doi:10.1109/IEDM.1999.823868

Accurate thermal noise model for deep-submicron CMOS

A. J. Scholten, H. J. Tromp, L. F. Tiemeijer, R. van Langevelde, R. J. Havens, P. W.H. de Vreede, R. F.M. Roes, P. H. Woerlee, A. H. Montree, D. B.M. Klaassen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

85 Citations (Scopus)

Abstract

Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 μm down to 0.17 μm. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.

Original language	English
Title of host publication	1999 IEEE International Devices Meeting (IEDM)
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	155-158
Number of pages	4
ISBN (Print)	0-7803-5410-9
DOIs	https://doi.org/10.1109/IEDM.1999.823868
Publication status	Published - 1 Dec 1999
Externally published	Yes
Event	1999 IEEE International Electron Devices Meeting, IEDM 1999 - Washington, United States Duration: 5 Dec 1999 → 8 Dec 1999

Conference

Conference	1999 IEEE International Electron Devices Meeting, IEDM 1999
Country/Territory	United States
City	Washington
Period	5/12/99 → 8/12/99

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10.1109/IEDM.1999.823868

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Scholten, A. J., Tromp, H. J., Tiemeijer, L. F., van Langevelde, R., Havens, R. J., de Vreede, P. W. H., Roes, R. F. M., Woerlee, P. H., Montree, A. H., & Klaassen, D. B. M. (1999). Accurate thermal noise model for deep-submicron CMOS. In 1999 IEEE International Devices Meeting (IEDM) (pp. 155-158). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/IEDM.1999.823868

@inproceedings{2a60071527c8449a800282f0e64e419a,

title = "Accurate thermal noise model for deep-submicron CMOS",

abstract = "Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 μm down to 0.17 μm. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.",

author = "Scholten, {A. J.} and Tromp, {H. J.} and Tiemeijer, {L. F.} and {van Langevelde}, R. and Havens, {R. J.} and {de Vreede}, {P. W.H.} and Roes, {R. F.M.} and Woerlee, {P. H.} and Montree, {A. H.} and Klaassen, {D. B.M.}",

year = "1999",

month = dec,

day = "1",

doi = "10.1109/IEDM.1999.823868",

language = "English",

isbn = "0-7803-5410-9",

pages = "155--158",

booktitle = "1999 IEEE International Devices Meeting (IEDM)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "1999 IEEE International Electron Devices Meeting, IEDM 1999 ; Conference date: 05-12-1999 Through 08-12-1999",

}

Scholten, AJ, Tromp, HJ, Tiemeijer, LF, van Langevelde, R, Havens, RJ, de Vreede, PWH, Roes, RFM, Woerlee, PH, Montree, AH & Klaassen, DBM 1999, Accurate thermal noise model for deep-submicron CMOS. in 1999 IEEE International Devices Meeting (IEDM). Institute of Electrical and Electronics Engineers, Piscataway, pp. 155-158, 1999 IEEE International Electron Devices Meeting, IEDM 1999, Washington, Washington, United States, 5/12/99. https://doi.org/10.1109/IEDM.1999.823868

TY - GEN

T1 - Accurate thermal noise model for deep-submicron CMOS

AU - Scholten, A. J.

AU - Tromp, H. J.

AU - Tiemeijer, L. F.

AU - van Langevelde, R.

AU - Havens, R. J.

AU - de Vreede, P. W.H.

AU - Roes, R. F.M.

AU - Woerlee, P. H.

AU - Montree, A. H.

AU - Klaassen, D. B.M.

PY - 1999/12/1

Y1 - 1999/12/1

N2 - Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 μm down to 0.17 μm. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.

AB - Extensive measurements of drain current thermal noise are presented for 3 different CMOS technologies and for gate lengths ranging from 2 μm down to 0.17 μm. Using a surface-potential-based compact MOS model with improved descriptions of carrier mobility and velocity saturation, all the experimental results can be described accurately without invoking carrier heating effects or introducing additional parameters.

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U2 - 10.1109/IEDM.1999.823868

DO - 10.1109/IEDM.1999.823868

M3 - Conference contribution

AN - SCOPUS:0033314182

SN - 0-7803-5410-9

SP - 155

EP - 158

BT - 1999 IEEE International Devices Meeting (IEDM)

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

T2 - 1999 IEEE International Electron Devices Meeting, IEDM 1999

Y2 - 5 December 1999 through 8 December 1999

ER -

Accurate thermal noise model for deep-submicron CMOS

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