Abstract
In this paper, the key characteristics of the main errors which affect the performance of a switched capacitor pipelined ADC are presented and their effects on the ADC transfer characteristics demonstrated. Clear and concise relationships are developed to aid optimized design of the pipeline ADC and error bounds are derived.
| Original language | English |
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| Title of host publication | Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2005) 23 - 26 May 2005, Kobe, Japan |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 1956-1959 |
| ISBN (Print) | 0-7803-8834-8 |
| Publication status | Published - 2005 |
| Event | 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005) - Kobe, Japan Duration: 23 May 2005 → 26 May 2005 |
Conference
| Conference | 2005 IEEE International Symposium on Circuits and Systems (ISCAS 2005) |
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| Abbreviated title | ISCAS 2005 |
| Country/Territory | Japan |
| City | Kobe |
| Period | 23/05/05 → 26/05/05 |