A yield centric statistical design method for optimization of the SRAM active column

T.S. Doorn; J.A. Croon; E.J.W. Maten, ter; A. Di Bucchianico

doi:10.1109/ESSCIRC.2009.5325954

A yield centric statistical design method for optimization of the SRAM active column

T.S. Doorn, J.A. Croon, E.J.W. Maten, ter, A. Di Bucchianico

Statistics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

7 Citations (Scopus)

188 Downloads (Pure)

Abstract

For robust design of SRAM memories, it is not sufficient to guarantee good statistical margins on the SRAM cell parameters. The sense amplifier needs sufficient input signal before it can reliably sense the data, while the SRAM cell requires sufficient time to develop that input signal. This paper presents a new statistical method that allows optimization of the access time of an SRAM memory, while guaranteeing a yield target set by the designer. Using this method, the access time of a high performance advanced CMOS SRAM has been improved 6%, while simultaneously reducing the sense amplifier size

Original language	English
Title of host publication	Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009)
Place of Publication	Piscataway, NJ
Publisher	Institute of Electrical and Electronics Engineers
Pages	352-355
ISBN (Print)	978-1-4244-4354-3
DOIs	https://doi.org/10.1109/ESSCIRC.2009.5325954
Publication status	Published - 2009

Access to Document

10.1109/ESSCIRC.2009.5325954

Metis233367Final published version, 290 KB

Cite this

Doorn, T. S., Croon, J. A., Maten, ter, E. J. W., & Di Bucchianico, A. (2009). A yield centric statistical design method for optimization of the SRAM active column. In Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009) (pp. 352-355). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ESSCIRC.2009.5325954

@inproceedings{63fd096ffa774a5a8d39073520fb9133,

title = "A yield centric statistical design method for optimization of the SRAM active column",

abstract = "For robust design of SRAM memories, it is not sufficient to guarantee good statistical margins on the SRAM cell parameters. The sense amplifier needs sufficient input signal before it can reliably sense the data, while the SRAM cell requires sufficient time to develop that input signal. This paper presents a new statistical method that allows optimization of the access time of an SRAM memory, while guaranteeing a yield target set by the designer. Using this method, the access time of a high performance advanced CMOS SRAM has been improved 6%, while simultaneously reducing the sense amplifier size",

author = "T.S. Doorn and J.A. Croon and {Maten, ter}, E.J.W. and {Di Bucchianico}, A.",

year = "2009",

doi = "10.1109/ESSCIRC.2009.5325954",

language = "English",

isbn = "978-1-4244-4354-3",

pages = "352--355",

booktitle = "Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009)",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Doorn, TS, Croon, JA, Maten, ter, EJW & Di Bucchianico, A 2009, A yield centric statistical design method for optimization of the SRAM active column. in Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009). Institute of Electrical and Electronics Engineers, Piscataway, NJ, pp. 352-355. https://doi.org/10.1109/ESSCIRC.2009.5325954

A yield centric statistical design method for optimization of the SRAM active column. / Doorn, T.S.; Croon, J.A.; Maten, ter, E.J.W. et al.
Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009). Piscataway, NJ: Institute of Electrical and Electronics Engineers, 2009. p. 352-355.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A yield centric statistical design method for optimization of the SRAM active column

AU - Doorn, T.S.

AU - Croon, J.A.

AU - Maten, ter, E.J.W.

AU - Di Bucchianico, A.

PY - 2009

Y1 - 2009

N2 - For robust design of SRAM memories, it is not sufficient to guarantee good statistical margins on the SRAM cell parameters. The sense amplifier needs sufficient input signal before it can reliably sense the data, while the SRAM cell requires sufficient time to develop that input signal. This paper presents a new statistical method that allows optimization of the access time of an SRAM memory, while guaranteeing a yield target set by the designer. Using this method, the access time of a high performance advanced CMOS SRAM has been improved 6%, while simultaneously reducing the sense amplifier size

AB - For robust design of SRAM memories, it is not sufficient to guarantee good statistical margins on the SRAM cell parameters. The sense amplifier needs sufficient input signal before it can reliably sense the data, while the SRAM cell requires sufficient time to develop that input signal. This paper presents a new statistical method that allows optimization of the access time of an SRAM memory, while guaranteeing a yield target set by the designer. Using this method, the access time of a high performance advanced CMOS SRAM has been improved 6%, while simultaneously reducing the sense amplifier size

U2 - 10.1109/ESSCIRC.2009.5325954

DO - 10.1109/ESSCIRC.2009.5325954

M3 - Conference contribution

SN - 978-1-4244-4354-3

SP - 352

EP - 355

BT - Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009)

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway, NJ

ER -

Doorn TS, Croon JA, Maten, ter EJW, Di Bucchianico A. A yield centric statistical design method for optimization of the SRAM active column. In Proceedings of the 35th European Solid-State Circuits Conference (ESSCIRC 2009, Athens, Greece, September 14-18, 2009). Piscataway, NJ: Institute of Electrical and Electronics Engineers. 2009. p. 352-355 doi: 10.1109/ESSCIRC.2009.5325954

A yield centric statistical design method for optimization of the SRAM active column

Abstract

Access to Document

Fingerprint

Cite this