Abstract
This paper describes a single-PLL, fixed-oscillator, wide-band multi-tuner HD Radio & DAB/T-DMB receiver for concurrent multi-band & multi-channel car radio reception, fully integrated in a 65nm CMOS SoC. Besides saving area and power for the LO and clock generation, the presented architecture also prevents oscillator pulling and spurs. Harmonic rejection mixers have been used to suppress down-conversion with LO harmonics up to 60dB, which reduces the required amount of RF filtering. The DAB measurement results show best-in-class blocker performance (FoS up to 70dBc) in combination with state-of-the-art sensitivity down to -102dBm.
Original language | English |
---|---|
Title of host publication | RFIC 2016 - 2016 IEEE Radio Frequency Integrated Circuits Symposium |
Place of Publication | Piscataway |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 330-333 |
Number of pages | 4 |
ISBN (Electronic) | 9781467386500 |
DOIs | |
Publication status | Published - 8 Jul 2016 |
Event | 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2016) - Moscone Convention Center, San Francisco, United States Duration: 22 May 2016 → 24 May 2016 |
Conference
Conference | 2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2016) |
---|---|
Abbreviated title | RFIC 2016 |
Country/Territory | United States |
City | San Francisco |
Period | 22/05/16 → 24/05/16 |
Keywords
- ADPLL
- CMOS
- DAB
- delta-sigma ADC
- feedback amplifier
- fixed-oscillator
- harmonic rejection mixer
- HD radio
- inverter based LNA
- multi-channel
- multi-phase
- multiband
- receiver
- SoC
- software-defined radio (SDR)
- T-DMB
- tuner
- wideband