A wideband envelope detector with low ripple and high detection speed

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Abstract

In this paper, a new envelope detector design in a 40nm CMOS technology is presented. The design employs quadrature signal generation and 2nd harmonic cancellation to reduce output ripple while achieving high detection speed at the same time. The envelope detector operates from 500MHz to 6GHz with a detection speed of 250 MHz. It achieves less than 2% ripple, 0.64 ns delay and consumes 76.9 uW. With the achieved results, it is suitable for use in a nonlinear interference suppression receiver, enabling more than 25 dB of suppression.

Original languageEnglish
Title of host publication2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers
Pages1-5
Number of pages5
Volume2018-May
ISBN (Electronic)9781538648810
DOIs
Publication statusPublished - 26 Apr 2018
Event2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Florence Conference Center, Florence, Italy
Duration: 27 May 201830 May 2018
https://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=8334884

Conference

Conference2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
Abbreviated titleISCAS 2018
CountryItaly
CityFlorence
Period27/05/1830/05/18
Internet address

Keywords

  • envelope detector
  • harmonic rejection
  • interference suppression
  • quadrature generation

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  • Cite this

    Ying, K., Gao, H., Min, X., Milosevic, D., & Baltus, P. (2018). A wideband envelope detector with low ripple and high detection speed. In 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings (Vol. 2018-May, pp. 1-5). [8351246] Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISCAS.2018.8351246