A unified approach to mapping and routing on a network-on-chip for both best-effort and guaranteed service traffic

M.A. Hansson, K.G.W. Goossens, A. Radulescu

Research output: Contribution to journalArticleAcademicpeer-review

70 Citations (Scopus)
103 Downloads (Pure)

Abstract

One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective functions. In this paper, we present a unified single-objective algorithm, called Unified MApping, Routing, and Slot allocation (UMARS+). As the main contribution, we show how to couple path selection, mapping of cores, and channel time-slot allocation to minimize the network required to meet the constraints of the application. The time-complexity of UMARS+ is low and experimental results indicate a run-time only 20% higher than that of path selection alone. We apply the algorithm to an MPEG decoder System-on-Chip, reducing area by 33%, power dissipation by 35%, and worst-case latency by a factor four over a traditional waterfall approach. U7 - Cited By (since 1996): 6 U7 - Export Date: 5 February 2010 U7 - Source: Scopus U7 - Art. No.: 68432
Original languageEnglish
Number of pages16
JournalVLSI Design
Volume2007
DOIs
Publication statusPublished - 2007

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