This paper presents a self-calibrating RF energy harvester capable of harvesting at lower input power levels than current state-of-the-art RF harvesters. A 5 stage cross-connected bridge rectifier is brought at resonance with a high-Q loop antenna by means of a 7-bit binary weighted capacitor bank. A control loop compensates any variation in the antenna-rectifier interface and passively boosts the antenna voltage to enhance the sensitivity. The rectifier and capacitor bank have been implemented in standard 90nm CMOS technology, includes ESD protection and are integrated on the antenna. Measurements in an anechoic chamber at 868 MHz show a -26.3 dBm sensitivity for 1V output and 25 meter range for a 1.78 W RF source in an office corridor. The maximum power efficiency of the complete harvester is 31.5%.
|Title of host publication||2013 Symposium on VLSI Circuits, VLSIC 2013 - Digest of Technical Papers|
|Publication status||Published - 17 Sep 2013|
|Event||2013 Symposium on VLSI Circuits, VLSIC 2013 - Kyoto, Japan|
Duration: 12 Jun 2013 → 14 Jun 2013
|Conference||2013 Symposium on VLSI Circuits, VLSIC 2013|
|Period||12/06/13 → 14/06/13|