A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver

Yuting Shen; Hanyue Li; Eugenio Cantatore; Pieter Harpe

doi:10.1109/ISCAS48785.2022.9937587

A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver

Yuting Shen, Hanyue Li, Eugenio Cantatore, Pieter Harpe

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

1 Citation (Scopus)

121 Downloads (Pure)

Abstract

This work presents a reconfigurable delay and redundancy technique, which relaxes the reference driver requirements for a charge-redistribution SAR ADC. By selectively adding delay to the most critical SAR cycle, the overall speed of the ADC is only slightly degraded, while the output impedance of the driver or the amount of decoupling capacitance can be reduced substantially. In a simulated 10-bit 10 MS/s SAR ADC prototype, the proposed technique reduces the decoupling capacitance by 16× while maintaining 59.2 dB SNDR and 71.2 dB SFDR at a power consumption of 32 mu mathrm{W}. The estimated area is 0.002 mm2 including decoupling capacitors.

Original language	English
Title of host publication	IEEE International Symposium on Circuits and Systems, ISCAS 2022
Publisher	Institute of Electrical and Electronics Engineers
Pages	11-15
Number of pages	5
ISBN (Electronic)	9781665484855
DOIs	https://doi.org/10.1109/ISCAS48785.2022.9937587
Publication status	Published - 2022
Event	2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022 - Austin, United States Duration: 27 May 2022 → 1 Jun 2022

Conference

Conference	2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022
Country/Territory	United States
City	Austin
Period	27/05/22 → 1/06/22

Bibliographical note

Funding Information:
This work with project number 16594 is financed by the Dutch Research Council (NWO).

Keywords

Analog-to-digital converter
decoupling capacitor
redundancy
reference voltage driving

Access to Document

10.1109/ISCAS48785.2022.9937587

202205 ISCAS paperFinal author version , 675 KBLicence: Unspecified

Cite this

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title = "A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver",

abstract = "This work presents a reconfigurable delay and redundancy technique, which relaxes the reference driver requirements for a charge-redistribution SAR ADC. By selectively adding delay to the most critical SAR cycle, the overall speed of the ADC is only slightly degraded, while the output impedance of the driver or the amount of decoupling capacitance can be reduced substantially. In a simulated 10-bit 10 MS/s SAR ADC prototype, the proposed technique reduces the decoupling capacitance by 16× while maintaining 59.2 dB SNDR and 71.2 dB SFDR at a power consumption of 32 mu mathrm{W}. The estimated area is 0.002 mm2 including decoupling capacitors.",

keywords = "Analog-to-digital converter, decoupling capacitor, redundancy, reference voltage driving",

author = "Yuting Shen and Hanyue Li and Eugenio Cantatore and Pieter Harpe",

note = "Funding Information: This work with project number 16594 is financed by the Dutch Research Council (NWO). ; 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022 ; Conference date: 27-05-2022 Through 01-06-2022",

year = "2022",

doi = "10.1109/ISCAS48785.2022.9937587",

language = "English",

pages = "11--15",

booktitle = "IEEE International Symposium on Circuits and Systems, ISCAS 2022",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Shen, Y, Li, H , Cantatore, E & Harpe, P 2022, A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver. in IEEE International Symposium on Circuits and Systems, ISCAS 2022., 9937587, Institute of Electrical and Electronics Engineers, pp. 11-15, 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022, Austin, Texas, United States, 27/05/22. https://doi.org/10.1109/ISCAS48785.2022.9937587

A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver. / Shen, Yuting; Li, Hanyue ; Cantatore, Eugenio et al.
IEEE International Symposium on Circuits and Systems, ISCAS 2022. Institute of Electrical and Electronics Engineers, 2022. p. 11-15 9937587.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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T1 - A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver

AU - Shen, Yuting

AU - Li, Hanyue

AU - Cantatore, Eugenio

AU - Harpe, Pieter

N1 - Funding Information: This work with project number 16594 is financed by the Dutch Research Council (NWO).

PY - 2022

Y1 - 2022

N2 - This work presents a reconfigurable delay and redundancy technique, which relaxes the reference driver requirements for a charge-redistribution SAR ADC. By selectively adding delay to the most critical SAR cycle, the overall speed of the ADC is only slightly degraded, while the output impedance of the driver or the amount of decoupling capacitance can be reduced substantially. In a simulated 10-bit 10 MS/s SAR ADC prototype, the proposed technique reduces the decoupling capacitance by 16× while maintaining 59.2 dB SNDR and 71.2 dB SFDR at a power consumption of 32 mu mathrm{W}. The estimated area is 0.002 mm2 including decoupling capacitors.

AB - This work presents a reconfigurable delay and redundancy technique, which relaxes the reference driver requirements for a charge-redistribution SAR ADC. By selectively adding delay to the most critical SAR cycle, the overall speed of the ADC is only slightly degraded, while the output impedance of the driver or the amount of decoupling capacitance can be reduced substantially. In a simulated 10-bit 10 MS/s SAR ADC prototype, the proposed technique reduces the decoupling capacitance by 16× while maintaining 59.2 dB SNDR and 71.2 dB SFDR at a power consumption of 32 mu mathrm{W}. The estimated area is 0.002 mm2 including decoupling capacitors.

KW - Analog-to-digital converter

KW - decoupling capacitor

KW - redundancy

KW - reference voltage driving

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M3 - Conference contribution

AN - SCOPUS:85142507977

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EP - 15

BT - IEEE International Symposium on Circuits and Systems, ISCAS 2022

PB - Institute of Electrical and Electronics Engineers

T2 - 2022 IEEE International Symposium on Circuits and Systems, ISCAS 2022

Y2 - 27 May 2022 through 1 June 2022

ER -

A SAR ADC with Reconfigurable Delay and Redundancy to Relax the Reference Driver

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Keywords

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