A S-band Switchless Bi-directional Transceiver with a 52% Fractional Bandwidth in CMOS Technology

This paper presents a bi-directional switchless wideband transceiver front-end for S-band multi-functional digital array system. In an S-band digital array system, a silicon-based RF front-end module requires a high integration level, compact size, large bandwidth, and low power consumption features. A bi-directional switchless transceiver could provide a compact solution. However, the shared RF matching network in such a transceiver is crucial due to its influence on Rx sensitivity, Tx output power, TRx isolation, and bandwidth. This work proposes a compact π matching network for simultaneous broadband Rx noise matching, Tx power matching, and TRx isolation. Also, a double quadrature down-conversion architecture is proposed to improve image signal rejection in the whole S-band. Therefore, false detection in the S-band digital array can be avoided. Fabricated in a 0.18μm CMOS technology, this S-band transceiver occupies a silicon area of 3.2 × 2 mm ². In the Rx mode, the measured gain is 20.7–28 dB in 2–4 GHz at 25 °C. The RX noise figure is 9.5–11.5 dB, and the input 1-dB compression point is -11 dBm. In the Tx mode, the gain is 16.5–19.6 dB in 2–4 GHz at 25 °C, and Psat is 10.2 dBm. The RX bandwidth is 2–3.4 GHz, while that of Tx is 2–4 GHz. The corresponding fractional bandwidth is 52% and 67%, respectively. Furthermore, this transceiver shows an image rejection ratio of 28.9–41.4 dB suppression at the operation frequency band.