In this paper a physically based compact model is presented which incudes the specific aspects of an SOI-LDMOS transistor, like the lateral doping gradient in the channel and the effect of the gate extending over the drift region.To have an accurate description at all bias conditions, the model is formulated in terms of surface potentials. In contract o circuit-evel models, the so-called internal drain voltage is solved analytically in terms of the terminal voltages. The resulting compact model thus combines the benefits of short comutation times and robustness of explicitly formulated models with accuracy. A comparison with date measured on tansistors of different dimensions and operating temperatures shows that the model provides an accurate well scaled description in al regimes of operation. Since all model expressions and their derivatives are continuous the use of this compact model demonstrates improved convergence in circuit simulation.
|Title of host publication||Proceedings 32nd European Solid State Device Research Conference (ESSDERC 2002, Firenze, Italy, September 24-26, 2002)|
|Publication status||Published - 2002|