A Passive Single-Ended-to-Differential-Converter with SAR ADC Achieving 6.1fJ/Conversion-Step

Mariska van der Struijk; Kevin Pelzers; Pieter Harpe

doi:10.1109/MWSCAS47672.2021.9531821

A Passive Single-Ended-to-Differential-Converter with SAR ADC Achieving 6.1fJ/Conversion-Step

Mariska van der Struijk
, Kevin Pelzers
, Pieter Harpe

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

Abstract

This paper proposes a passive switched-capacitor single-ended-to-differential-converter (SDC) as a front-end of a differential SAR ADC to enable digitization of single-ended signals. Compared to active SDC solutions or single-ended SAR ADCs, the proposed solution offers the smallest total capacitance as well as best power efficiency and least chip area. A noise analysis further shows that the passive SDC does not result in a noise penalty of the overall system. A prototype implementation in 65nm CMOS achieves a figure-of-merit of 6.1fJ/conversion-step at 20MS/s, while reaching an SNDR of 54.7dB up to Nyquist and occupying a chip area of only 60μm × 36μm.

Original language	English
Title of host publication	2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers
Pages	288-291
Number of pages	4
ISBN (Electronic)	9781665424615
DOIs	https://doi.org/10.1109/MWSCAS47672.2021.9531821
Publication status	Published - 13 Sept 2021
Event	2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Virtual, East Lansing, United States Duration: 9 Aug 2021 → 11 Aug 2021

Conference

Conference	2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021
Country/Territory	United States
City	Virtual, East Lansing
Period	9/08/21 → 11/08/21

Bibliographical note

Funding Information:
This work is part of the POSITION-II project funded by the ECSEL Joint Undertaking under grant number Ecsel-783132-Position-II-2017-IA.

Funding

This work is part of the POSITION-II project funded by the ECSEL Joint Undertaking under grant number Ecsel-783132-Position-II-2017-IA.

Access to Document

10.1109/MWSCAS47672.2021.9531821

Cite this

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title = "A Passive Single-Ended-to-Differential-Converter with SAR ADC Achieving 6.1fJ/Conversion-Step",

abstract = "This paper proposes a passive switched-capacitor single-ended-to-differential-converter (SDC) as a front-end of a differential SAR ADC to enable digitization of single-ended signals. Compared to active SDC solutions or single-ended SAR ADCs, the proposed solution offers the smallest total capacitance as well as best power efficiency and least chip area. A noise analysis further shows that the passive SDC does not result in a noise penalty of the overall system. A prototype implementation in 65nm CMOS achieves a figure-of-merit of 6.1fJ/conversion-step at 20MS/s, while reaching an SNDR of 54.7dB up to Nyquist and occupying a chip area of only 60μm {\texttimes} 36μm.",

author = "\{van der Struijk\}, Mariska and Kevin Pelzers and Pieter Harpe",

note = "Funding Information: This work is part of the POSITION-II project funded by the ECSEL Joint Undertaking under grant number Ecsel-783132-Position-II-2017-IA. ; 2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 ; Conference date: 09-08-2021 Through 11-08-2021",

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doi = "10.1109/MWSCAS47672.2021.9531821",

language = "English",

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booktitle = "2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Proceedings",

publisher = "Institute of Electrical and Electronics Engineers",

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van der Struijk, M, Pelzers, K & Harpe, P 2021, A Passive Single-Ended-to-Differential-Converter with SAR ADC Achieving 6.1fJ/Conversion-Step. in 2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Proceedings. Institute of Electrical and Electronics Engineers, pp. 288-291, 2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021, Virtual, East Lansing, United States, 9/08/21. https://doi.org/10.1109/MWSCAS47672.2021.9531821

A Passive Single-Ended-to-Differential-Converter with SAR ADC Achieving 6.1fJ/Conversion-Step. / van der Struijk, Mariska; Pelzers, Kevin ; Harpe, Pieter.
2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Proceedings. Institute of Electrical and Electronics Engineers, 2021. p. 288-291.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - van der Struijk, Mariska

AU - Pelzers, Kevin

AU - Harpe, Pieter

N1 - Funding Information: This work is part of the POSITION-II project funded by the ECSEL Joint Undertaking under grant number Ecsel-783132-Position-II-2017-IA.

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N2 - This paper proposes a passive switched-capacitor single-ended-to-differential-converter (SDC) as a front-end of a differential SAR ADC to enable digitization of single-ended signals. Compared to active SDC solutions or single-ended SAR ADCs, the proposed solution offers the smallest total capacitance as well as best power efficiency and least chip area. A noise analysis further shows that the passive SDC does not result in a noise penalty of the overall system. A prototype implementation in 65nm CMOS achieves a figure-of-merit of 6.1fJ/conversion-step at 20MS/s, while reaching an SNDR of 54.7dB up to Nyquist and occupying a chip area of only 60μm × 36μm.

AB - This paper proposes a passive switched-capacitor single-ended-to-differential-converter (SDC) as a front-end of a differential SAR ADC to enable digitization of single-ended signals. Compared to active SDC solutions or single-ended SAR ADCs, the proposed solution offers the smallest total capacitance as well as best power efficiency and least chip area. A noise analysis further shows that the passive SDC does not result in a noise penalty of the overall system. A prototype implementation in 65nm CMOS achieves a figure-of-merit of 6.1fJ/conversion-step at 20MS/s, while reaching an SNDR of 54.7dB up to Nyquist and occupying a chip area of only 60μm × 36μm.

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BT - 2021 IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2021 - Proceedings

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ER -

A Passive Single-Ended-to-Differential-Converter with SAR ADC Achieving 6.1fJ/Conversion-Step

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