A novel temperature and disturbance insensitive DAC calibration method

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Abstract

This paper presents a new foreground DAC calibration method that is insensitive to temperature fluctuations and on-chip disturbances. In the proposed current cell, the same number of unit transistors is always used, guaranteeing matched response for all current cells. These transistors are divided in two groups: a fixed group and a configurable group. The unit transistors in the configurable group can be interchanged with additional redundant unit transistors, such that the mismatch errors of the configurable group compensate the mismatch errors of the fixed group. Together they generate the needed output current. Thus all current cells feature matched temperature coefficients and dynamic response. For an exemplary 6+6bits segmented current steering DAC, the expected 99% yield INL improves with almost 3 bits while using only 30% additional unit transistors.
Original languageEnglish
Title of host publicationProceedings of the 2011 International Symposium on Circuits and Systems (ISCAS), 15 - 18 May 2011, Rio de Janeiro, Brazil
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages2003-2006
ISBN (Print)978-1-4244-9472-9
DOIs
Publication statusPublished - 2011

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