Abstract
This paper proposes a self-corrected In-phase/Quadrature-phase (I/Q) digital Cartesian modulator. The modulator is comprised of double balanced Gilbert cells to mitigate code dependent input and output impedances. Transistor-level simulations in 28 nm bulk CMOS demonstrate a static error vector magnitude (EVM) of −35 dB at 79 GHz carrier while providing 9.5 dBm peak output power with ~19% drain efficiency. Transistor level analysis shows that the linearity is limited by the transconductance (gm) I and Q input code dependency. To address this dependency a self-contained 2-dimensional correction technique is proposed. The proposed correction method improves the EVM from −35 dB to −42.5 dB without compromising the output power, power efficiency and occupied silicon area. The proposed solution enables linear and power efficient transmitters (TXs) for mm-Wave applications.
Original language | English |
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Title of host publication | 2021 IEEE International Symposium on Circuits and Systems, ISCAS 2021 - Proceedings |
Publisher | IEEE/LEOS |
Number of pages | 5 |
ISBN (Electronic) | 9781728192017 |
ISBN (Print) | 978-1-7281-9202-4 |
DOIs | |
Publication status | Published - 27 Apr 2021 |
Event | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 - VIRTUAL, Daegu, Korea, Republic of Duration: 22 May 2021 → 28 May 2021 |
Conference
Conference | 53rd IEEE International Symposium on Circuits and Systems, ISCAS 2021 |
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Country/Territory | Korea, Republic of |
City | Daegu |
Period | 22/05/21 → 28/05/21 |
Keywords
- Wireless communication
- Transmitters
- Modulation
- Linearity
- Topology
- Transistors
- Power generation