Skip to main navigation Skip to search Skip to main content

A microcontroller with 96% power-conversion efficiency using stacked voltage domains

  • K. Blutman
  • , A. Kapoor
  • , A. Majumdar
  • , J.G. Martinez
  • , J. Echeverri
  • , L. Sevat
  • , A. Van Der Wel
  • , H. Fatemi
  • , J. Pineda de Gyvez
  • , K. Makinwa

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

2 Downloads (Pure)

Abstract

This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

Original languageEnglish
Title of host publication2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii
PublisherInstitute of Electrical and Electronics Engineers
Pages1-2
ISBN (Electronic)9781509006342
ISBN (Print)Piscataway
DOIs
Publication statusPublished - 21 Sept 2016
Event2016 Symposium on VLSI Circuits (VLSIC 2016) - Honolulu, United States
Duration: 14 Jun 201617 Jun 2016
Conference number: 30

Conference

Conference2016 Symposium on VLSI Circuits (VLSIC 2016)
Abbreviated titleVLSIC 2016
Country/TerritoryUnited States
CityHonolulu
Period14/06/1617/06/16

Fingerprint

Dive into the research topics of 'A microcontroller with 96% power-conversion efficiency using stacked voltage domains'. Together they form a unique fingerprint.

Cite this