A microcontroller with 96% power-conversion efficiency using stacked voltage domains

K. Blutman; A. Kapoor; A. Majumdar; J.G. Martinez; J. Echeverri; L. Sevat; A. Van Der Wel; H. Fatemi; J. Pineda de Gyvez; K. Makinwa

doi:10.1109/VLSIC.2016.7573478

A microcontroller with 96% power-conversion efficiency using stacked voltage domains

K. Blutman, A. Kapoor, A. Majumdar, J.G. Martinez, J. Echeverri, L. Sevat, A. Van Der Wel, H. Fatemi, J. Pineda de Gyvez, K. Makinwa

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

6 Citations (Scopus)

2 Downloads (Pure)

Abstract

This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

Original language	English
Title of host publication	2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii
Publisher	Institute of Electrical and Electronics Engineers
Pages	1-2
ISBN (Electronic)	9781509006342
ISBN (Print)	Piscataway
DOIs	https://doi.org/10.1109/VLSIC.2016.7573478
Publication status	Published - 21 Sep 2016
Event	2016 Symposium on VLSI Circuits (VLSIC 2016) - Honolulu, United States Duration: 14 Jun 2016 → 17 Jun 2016 Conference number: 30

Conference

Conference	2016 Symposium on VLSI Circuits (VLSIC 2016)
Abbreviated title	VLSIC 2016
Country/Territory	United States
City	Honolulu
Period	14/06/16 → 17/06/16

Access to Document

10.1109/VLSIC.2016.7573478

Cite this

Blutman, K., Kapoor, A., Majumdar, A., Martinez, J. G., Echeverri, J., Sevat, L., Van Der Wel, A., Fatemi, H., Pineda de Gyvez, J., & Makinwa, K. (2016). A microcontroller with 96% power-conversion efficiency using stacked voltage domains. In 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii (pp. 1-2). [7573478] Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/VLSIC.2016.7573478

Blutman, K. ; Kapoor, A. ; Majumdar, A. ; Martinez, J.G. ; Echeverri, J. ; Sevat, L. ; Van Der Wel, A. ; Fatemi, H. ; Pineda de Gyvez, J. ; Makinwa, K. / A microcontroller with 96% power-conversion efficiency using stacked voltage domains. 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii. Institute of Electrical and Electronics Engineers, 2016. pp. 1-2

@inproceedings{8bb8816841ca47a69a24603573b3b071,

title = "A microcontroller with 96% power-conversion efficiency using stacked voltage domains",

abstract = "This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).",

author = "K. Blutman and A. Kapoor and A. Majumdar and J.G. Martinez and J. Echeverri and L. Sevat and {Van Der Wel}, A. and H. Fatemi and {Pineda de Gyvez}, J. and K. Makinwa",

year = "2016",

month = sep,

day = "21",

doi = "10.1109/VLSIC.2016.7573478",

language = "English",

isbn = "Piscataway",

pages = "1--2",

booktitle = "2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "2016 Symposium on VLSI Circuits (VLSIC 2016), VLSIC 2016 ; Conference date: 14-06-2016 Through 17-06-2016",

}

Blutman, K, Kapoor, A, Majumdar, A, Martinez, JG, Echeverri, J, Sevat, L, Van Der Wel, A, Fatemi, H, Pineda de Gyvez, J & Makinwa, K 2016, A microcontroller with 96% power-conversion efficiency using stacked voltage domains. in 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii., 7573478, Institute of Electrical and Electronics Engineers, pp. 1-2, 2016 Symposium on VLSI Circuits (VLSIC 2016), Honolulu, United States, 14/06/16. https://doi.org/10.1109/VLSIC.2016.7573478

A microcontroller with 96% power-conversion efficiency using stacked voltage domains. / Blutman, K.; Kapoor, A.; Majumdar, A.; Martinez, J.G.; Echeverri, J.; Sevat, L.; Van Der Wel, A.; Fatemi, H.; Pineda de Gyvez, J.; Makinwa, K.

2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii. Institute of Electrical and Electronics Engineers, 2016. p. 1-2 7573478.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A microcontroller with 96% power-conversion efficiency using stacked voltage domains

AU - Blutman, K.

AU - Kapoor, A.

AU - Majumdar, A.

AU - Martinez, J.G.

AU - Echeverri, J.

AU - Sevat, L.

AU - Van Der Wel, A.

AU - Fatemi, H.

AU - Pineda de Gyvez, J.

AU - Makinwa, K.

N1 - Conference code: 30

PY - 2016/9/21

Y1 - 2016/9/21

N2 - This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

AB - This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).

UR - http://www.scopus.com/inward/record.url?scp=84990956908&partnerID=8YFLogxK

U2 - 10.1109/VLSIC.2016.7573478

DO - 10.1109/VLSIC.2016.7573478

M3 - Conference contribution

AN - SCOPUS:84990956908

SN - Piscataway

SP - 1

EP - 2

BT - 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii

PB - Institute of Electrical and Electronics Engineers

T2 - 2016 Symposium on VLSI Circuits (VLSIC 2016)

Y2 - 14 June 2016 through 17 June 2016

ER -

A microcontroller with 96% power-conversion efficiency using stacked voltage domains

Abstract

Conference

Access to Document

Other files and links

Fingerprint

Cite this