Abstract
This paper presents a CMOS 40nm microcontroller where for the first time, stacked voltage domains are used. The system features an ARM Cortex M0+ processor, 4kB ROM, 16kB SRAM, peripherals, and an on-chip switched-capacitor voltage regulator (SCVR). By using voltage stacking the test chip achieves state-of-the-art (96%) power-conversion efficiency and observed power savings run from 23% to 63% depending upon the payload current, while supply voltage variations are reduced from 5.6mV to 3.8mV (RMS).
Original language | English |
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Title of host publication | 2016 IEEE Symposium on VLSI Circuits, 15-17 June 2016, Honolulu, Hawaii |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1-2 |
ISBN (Electronic) | 9781509006342 |
ISBN (Print) | Piscataway |
DOIs | |
Publication status | Published - 21 Sep 2016 |
Event | 2016 Symposium on VLSI Circuits (VLSIC 2016) - Honolulu, United States Duration: 14 Jun 2016 → 17 Jun 2016 Conference number: 30 |
Conference
Conference | 2016 Symposium on VLSI Circuits (VLSIC 2016) |
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Abbreviated title | VLSIC 2016 |
Country/Territory | United States |
City | Honolulu |
Period | 14/06/16 → 17/06/16 |