A generalised approach to gate array layout design automation

A.G.J. Slenter

Research output: Thesis › Phd Thesis 1 (Research TU/e / Graduation TU/e)

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Original language	English
Qualification	Doctor of Philosophy
Awarding Institution	Electrical Engineering
Supervisors/Advisors	Jess, Jochen, Promotor Otten, Ralph, Promotor
Award date	11 Dec 1990
Place of Publication	Eindhoven
Publisher	Technische Universiteit Eindhoven
Print ISBNs	90-9003442-0
DOIs	https://doi.org/10.6100/IR342622
Publication status	Published - 1990

Access to Document

@phdthesis{7ca0b4ca1c0d47e29306be0c4ff868ba,

title = "A generalised approach to gate array layout design automation",

author = "A.G.J. Slenter",

year = "1990",

doi = "10.6100/IR342622",

language = "English",

isbn = "90-9003442-0",

publisher = "Technische Universiteit Eindhoven",

type = "Phd Thesis 1 (Research TU/e / Graduation TU/e)",

school = "Electrical Engineering",

}