A formal model of lower system layers

J. Schmaltz

doi:10.1109/FMCAD.2006.1

A formal model of lower system layers

J. Schmaltz

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

8 Citations (Scopus)

Abstract

We present a formal model of the bit transmission between registers with arbitrary clock periods. Our model considers precise timing parameters, as well as metastability. We formally define the behavior of registers over time. From that definition, we prove, under certain conditions, that data are properly transmitted. We discuss how to incorporate the model in a purely digital model. The hypotheses of our main theorem define conditions that must be satisfied by the purely digital part of the system to preserve correctness.

Original language	English
Title of host publication	Formal Methods in Computer-Aided Design (6th International Conference, FMCAD'06, San Jose CA, USA, November 12-16, 2006. Proceedings)
Publisher	IEEE Computer Society
Pages	191-192
ISBN (Print)	0-7695-2707-8
DOIs	https://doi.org/10.1109/FMCAD.2006.1
Publication status	Published - 2006

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10.1109/FMCAD.2006.1

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title = "A formal model of lower system layers",

abstract = "We present a formal model of the bit transmission between registers with arbitrary clock periods. Our model considers precise timing parameters, as well as metastability. We formally define the behavior of registers over time. From that definition, we prove, under certain conditions, that data are properly transmitted. We discuss how to incorporate the model in a purely digital model. The hypotheses of our main theorem define conditions that must be satisfied by the purely digital part of the system to preserve correctness.",

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AB - We present a formal model of the bit transmission between registers with arbitrary clock periods. Our model considers precise timing parameters, as well as metastability. We formally define the behavior of registers over time. From that definition, we prove, under certain conditions, that data are properly transmitted. We discuss how to incorporate the model in a purely digital model. The hypotheses of our main theorem define conditions that must be satisfied by the purely digital part of the system to preserve correctness.

UR - http://doi.ieeecomputersociety.org/10.1109/FMCAD.2006.1

U2 - 10.1109/FMCAD.2006.1

DO - 10.1109/FMCAD.2006.1

M3 - Conference contribution

SN - 0-7695-2707-8

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EP - 192

BT - Formal Methods in Computer-Aided Design (6th International Conference, FMCAD'06, San Jose CA, USA, November 12-16, 2006. Proceedings)

PB - IEEE Computer Society

ER -

A formal model of lower system layers

Abstract

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