A fast and accurate SystemC-AMS model for PLL

Kezheng Ma, Rene van Leuken, Maja Vidojkovic, Jac Romme, Simonetta Rampu, Hans Pflug, Li Huang, Guido Dolmans

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

4 Citations (Scopus)

Abstract

PLLs have become an important part of electrical systems. When designing a PLL, an efficient and reliable simulation platform for system evaluation is needed. However, the closed loop simulation of a PLL is time consuming. To address this problem, in this paper, a new PLL model containing both digital and analog parts based on the recently published SystemC/SystemC-AMS (BETA version) language is presented. Many imperfections such as Voltage Control Oscillator (VCO) noise or reference jitter are included in this model. By comparing with the Matlab model, the SystemC/SystemC-AMS model can dramatically reduce simulation time. Also, by comparing with Analog Device's ADI SimPLL simulation results, Cadence simulation results and real measurement results, the accuracy of the SystemC/SystemC-AMS model is demonstrated. The paper shows the feasibility of a unified design environment for mixed-signal modeling based on SystemC/SystemC-AMS in order to reduce the cost and design time of electrical systems.

Original languageEnglish
Title of host publicationProceedings of the 18th International Conference - Mixed Design of Integrated Circuits and Systems, MIXDES 2011
Pages411-416
Number of pages6
Publication statusPublished - 4 Oct 2011
Externally publishedYes
Event18th International Conference - Mixed Design of Integrated Circuits and Systems, (MIXDES2011) - Gliwice, Poland
Duration: 16 Jun 201118 Jun 2011

Conference

Conference18th International Conference - Mixed Design of Integrated Circuits and Systems, (MIXDES2011)
Abbreviated titleMIXDES2011
CountryPoland
CityGliwice
Period16/06/1118/06/11

Keywords

  • hardware description language
  • mixed-signal modeling
  • Phase Locked Loop
  • SystemC/SystemC-AMS

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