A digital to time converter with fully digital calibration scheme for ultra-low power ADPLL in 40 nm CMOS

B. Wang, Y.-H. Liu, P.J.A. Harpe, J.H.C. Heuvel, van den, B. Liu, H. Gao, R.B. Staszewski

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

11 Citations (Scopus)
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