A design space exploration methodology for application specific MPSoC design

A.K. Singh; A. Kumar; Th. Srikanthan

doi:10.1109/ISVLSI.2011.44

A design space exploration methodology for application specific MPSoC design

A.K. Singh, A. Kumar, Th. Srikanthan

Electronic Systems

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

2 Citations (Scopus)

Abstract

System designers need to perform design-space exploration (DSE) to find appropriate number and type of processing elements (PEs) to be present in a Multiprocessor Systems-on-Chip (MPSoC) to support a throughput-constrained application. This paper presents a DSE methodology that provides application to MPSoC architecture mappings, where different PEs get used. The methodology starts from a mapping using only one type of processors and evaluates different mappings by increasing heterogeneity to improve the performance.

Original language	English
Title of host publication	Proceedings of the2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2011), 4-6 July 2011, Chennai, India
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	339-340
ISBN (Print)	978-1-4577-0803-9
DOIs	https://doi.org/10.1109/ISVLSI.2011.44
Publication status	Published - 2011

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10.1109/ISVLSI.2011.44

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A design space exploration methodology for application specific MPSoC design. / Singh, A.K.; Kumar, A.; Srikanthan, Th.

Proceedings of the2011 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2011), 4-6 July 2011, Chennai, India. Piscataway : Institute of Electrical and Electronics Engineers, 2011. p. 339-340.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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PB - Institute of Electrical and Electronics Engineers

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A design space exploration methodology for application specific MPSoC design

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