Abstract
This paper describes a mixed-signal ECG System-on-chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel impedance measurement with high signal quality. A custom digital signal processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. The SoC is implemented in 0.18μm CMOS process and consumes minimum 31.1μW from a 1.2V.
| Original language | English |
|---|---|
| Title of host publication | 2011 Symposium on VLSI Circuits, VLSIC 2011 - Digest of Technical Papers |
| Pages | 142-143 |
| Number of pages | 2 |
| Publication status | Published - 16 Sept 2011 |
| Externally published | Yes |
| Event | 2011 Symposium on VLSI Circuits (VLSIC 2011) - Rihga Royal Hotel, Kyoto, Japan Duration: 14 Jun 2011 → 17 Jun 2011 http://www.vlsisymposium.org/Past/11web/ |
Conference
| Conference | 2011 Symposium on VLSI Circuits (VLSIC 2011) |
|---|---|
| Abbreviated title | VLSIC 2011 |
| Country/Territory | Japan |
| City | Kyoto |
| Period | 14/06/11 → 17/06/11 |
| Other | Symposium held jointly with the 2011 Symposium on VLSI Technology |
| Internet address |
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