A configurable and low-power mixed signal SoC for portable ECG monitoring applications

H. Kim, S. Kim, N. van Helleputte, A. Artes, M. Konijnenburg, J. Huisken, C.A. Van Hoof, R.F. Yazicioglu

Research output: Contribution to journalArticleAcademicpeer-review

109 Citations (Scopus)

Abstract

This paper describes a mixed-signal ECG System-on-Chip (SoC) that is capable of implementing configurable functionality with low-power consumption for portable ECG monitoring applications. A low-voltage and high performance analog front-end extracts 3-channel ECG signals and single channel electrode-tissue-impedance (ETI) measurement with high signal quality. This can be used to evaluate the quality of the ECG measurement and to filter motion artifacts. A custom digital signal processor consisting of 4-way SIMD processor provides the configurability and advanced functionality like motion artifact removal and R peak detection. A built-in 12-bit analog-to-digital converter (ADC) is capable of adaptive sampling achieving a compression ratio of up to 7, and loop buffer integration reduces the power consumption for on-chip memory access. The SoC is implemented in 0.18 μ m CMOS process and consumes 32 μ W from a 1.2 V while heart beat detection application is running, and integrated in a wireless ECG monitoring system with Bluetooth protocol. Thanks to the ECG SoC, the overall system power consumption can be reduced significantly.

Original languageEnglish
Article number6544283
Pages (from-to)257-267
Number of pages11
JournalIEEE Transactions on Biomedical Circuits and Systems
Volume8
Issue number2
DOIs
Publication statusPublished - 2014
Externally publishedYes

Keywords

  • Biopotential recording
  • ECG
  • motion artifact reduction
  • R peak detection
  • System-on-Chip (SoC)

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