TY - JOUR
T1 - A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs
AU - Azevedo, Joao
AU - Virazel, Arnaud
AU - Bosio, Alberto
AU - Dilillo, Luigi
AU - Girard, Patrick
AU - Todri-Sanial, Aida
AU - Alvarez-Herault, Jérémy
AU - Mackay, Ken
PY - 2014
Y1 - 2014
N2 - Magnetic random access memory (MRAM) is an emerging technology with potential to become the universal on-chip memory. Among existing MRAM technologies, thermally assisted switching (TAS)-MRAM technology offers several advantages compared with other technologies: selectivity, single magnetic field, and high-integration density. In this paper, we analyze the impact of resistive-open defects on TAS-MRAM behavior. Electrical simulations were performed on a hypothetical 16 word TAS-MRAM architecture enabling any combination of read and write operations. Results show that read and write sequences may be affected by resistive-open defects that may induce single and double-cell faulty behaviors. As a next step, we will exploit the analyses results to guide the test phase by providing effective test algorithms targeting faults related to actual defects affecting TAS-MRAM architectures.
AB - Magnetic random access memory (MRAM) is an emerging technology with potential to become the universal on-chip memory. Among existing MRAM technologies, thermally assisted switching (TAS)-MRAM technology offers several advantages compared with other technologies: selectivity, single magnetic field, and high-integration density. In this paper, we analyze the impact of resistive-open defects on TAS-MRAM behavior. Electrical simulations were performed on a hypothetical 16 word TAS-MRAM architecture enabling any combination of read and write operations. Results show that read and write sequences may be affected by resistive-open defects that may induce single and double-cell faulty behaviors. As a next step, we will exploit the analyses results to guide the test phase by providing effective test algorithms targeting faults related to actual defects affecting TAS-MRAM architectures.
U2 - 10.1109/TVLSI.2013.2294080
DO - 10.1109/TVLSI.2013.2294080
M3 - Article
SN - 1063-8210
VL - 22
SP - 2326
EP - 2335
JO - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
JF - IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IS - 11
ER -