Abstract
A possible solution for avoiding the bottleneck in the global interconnection of the future generation of CMOS ICs, is by adding an optical interconnect layer on top of the silicon electronic integrated circuits. We present a compact photodetector (PD) structure that can be used for such photonic interconnections and can be fabricated through wafer-scale processing. The PD is designed to detect the optical signal propagating in a waveguide layer on top of the CMOS. Light is coupled first to an InP membrane waveguide on top of the interconnect layer and is then absorbed and detected in the PD. Simulations have been performed to design and optimize the coupling and the PD structure.
Original language | English |
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Title of host publication | Proceedings of the 10th Annual Symposium IEEE/LEOS Benelux Chapter, 1-2 December 2005, Mons, Belgium |
Editors | P. Mégret, M. Wuilpart, S. Bette, N. Staquet |
Place of Publication | Mons |
Publisher | IEEE/LEOS |
Pages | 233-236 |
ISBN (Print) | 2-9600226-4-5 |
Publication status | Published - 2005 |
Event | 10th Annual Symposium of the IEEE/LEOS Benelux Chapter, December 1-2, 2005, Mons, Belgium - Mons, Belgium Duration: 1 Dec 2005 → 2 Dec 2005 |
Conference
Conference | 10th Annual Symposium of the IEEE/LEOS Benelux Chapter, December 1-2, 2005, Mons, Belgium |
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Country/Territory | Belgium |
City | Mons |
Period | 1/12/05 → 2/12/05 |