A CMOS Current Sensing Interface with Sub-pA DC Uncertainty

Lin He; Hengzhuang Shi; Junhui Zhang; Mingxiang Wei; Ping Wang; Shunming li; Hao Gao; Zhikuang Cai

doi:10.1109/TCSII.2022.3227733

A CMOS Current Sensing Interface with Sub-pA DC Uncertainty

Lin He
, Hengzhuang Shi
, Junhui Zhang
, Mingxiang Wei
, Ping Wang
, Shunming li
, Hao Gao
, Zhikuang Cai (Corresponding author)

Integrated Circuits

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Abstract

This paper presents a CMOS current sensing interface with a dedicated analysis on dc uncertainty, especially the relationship among averaging, standard deviation and Allan variance. The dependence of the Allan variance on various noise sources is analyzed. The noise leakage mechanisms due to circuit nonidealities that lead to dc uncertainty are presented. A general design strategy toward a low dc uncertainty is drawn in this work. An auto-zeroing (AZ) capacitive transimpedance amplifier (CTIA) is reported for near-zero signal loss and near-perfect noise cancelation to achieve a low dc uncertainty. A prototype design implemented on 180nm CMOS process is presented and the measurement result shows a 73fA dc uncertainty.

Original language	English
Article number	9976050
Pages (from-to)	508-512
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	71
Issue number	2
Early online date	8 Dec 2022
DOIs	https://doi.org/10.1109/TCSII.2022.3227733
Publication status	Published - Feb 2024

Funding

This work was supported by the National Key Research and Development Program of China under Grant 2018YFB2003300 and Grant 2018YFB2202005.

Funders	Funder number
National Key Research and Development Program of China	2018YFB2003300, 2018YFB2202005

Keywords

Sensors
Uncertainty
White noise
Switches
Extraterrestrial measurements
Standards
Measurement uncertainty
Allan variance
current sensing interface
transimpendance amplifier
low noise

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10.1109/TCSII.2022.3227733

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Cite this

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AU - Gao, Hao

AU - Cai, Zhikuang

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A CMOS Current Sensing Interface with Sub-pA DC Uncertainty

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