A chip set for a digital audio broadcasting channel decoder

A. Delaruelle, J. Huisken, J. van Loon, F. Welten

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

1 Citation (Scopus)

Abstract

In this paper the design of two chips for an ASIC based channel decoder for a Digital Audio Broadcasting (DAB) system is discussed. The ASIC solution is a follow-up to an expensive implementation which is based on general purpose DSP processors. Both ASICs are used in a test receiver and a precursor consumer DAB receiver.

Original languageEnglish
Title of host publication1995 17th Annual Custom Integrated Circuits Conference
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages293-296
Number of pages4
ISBN (Print)0-7803-2584-2
DOIs
Publication statusPublished - 1 Jan 1995
Externally publishedYes
Event1995 17th Annual Custom Integrated Circuits Conference - Santa Clara, CA, USA
Duration: 1 May 19954 May 1995

Conference

Conference1995 17th Annual Custom Integrated Circuits Conference
CitySanta Clara, CA, USA
Period1/05/954/05/95

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