A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems

M.S. Zaman; Y. Wen; R. Fernandes; B. Buter; T.S. Doorn; M. Dijkstra; H.J. Bergveld; O. Trescases

doi:10.1109/ISPSD.2014.6856063

A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems

M.S. Zaman
, Y. Wen
, R. Fernandes
, B. Buter
, T.S. Doorn
, M. Dijkstra
, H.J. Bergveld
, O. Trescases

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

4 Citations (Scopus)

2 Downloads (Pure)

Abstract

This work presents a power management IC used to mitigate the effects of mismatch in Concentrating-Photovoltaic (CPV) systems. The IC contains a bi-directional dc-dc converter, an auxiliary boost converter to generate the internal 10 V power supply, as well as protection and monitoring circuits. The main power converter, with a maximum current rating of 1.5 A, is designed to equalize the voltage between neighbouring CPV cells by using the ¿-converter approach. Due to partial power processing, the converter's power rating and efficiency requirements are relaxed, leading to a more cost-effective solution with a high switching frequency of 3.6 MHz. An on-chip, mixed-signal controller regulates the main converter using a digital voltage loop and an analog hysteretic current-mode loop. The IC has several advanced features to reduce the light-load power consumption, including burst-mode operation in both the auxiliary and main-stage converters, as well as an input supply switching scheme for the internal linear voltage regulators.

Original language	English
Title of host publication	Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	410-413
ISBN (Print)	978-1-4799-2917-7
DOIs	https://doi.org/10.1109/ISPSD.2014.6856063
Publication status	Published - 2014
Event	26th International Symposium on Power Semiconductor Devices and ICs (ISPSD '14), June 15-19, 2014, Waikoloa, HI, USA - Hilton Waikoloa Village, Waikoloa, HI, United States Duration: 15 Jun 2014 → 19 Jun 2014 http://www.ispsd.org/#!/

Conference

Conference	26th International Symposium on Power Semiconductor Devices and ICs (ISPSD '14), June 15-19, 2014, Waikoloa, HI, USA
Abbreviated title	ISPSD '14
Country/Territory	United States
City	Waikoloa, HI
Period	15/06/14 → 19/06/14
Internet address	http://www.ispsd.org/#!/

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 7 Affordable and Clean Energy

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10.1109/ISPSD.2014.6856063

Cite this

Zaman, M. S., Wen, Y., Fernandes, R., Buter, B., Doorn, T. S., Dijkstra, M., Bergveld, H. J., & Trescases, O. (2014). A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems. In Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA (pp. 410-413). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISPSD.2014.6856063

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title = "A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems",

abstract = "This work presents a power management IC used to mitigate the effects of mismatch in Concentrating-Photovoltaic (CPV) systems. The IC contains a bi-directional dc-dc converter, an auxiliary boost converter to generate the internal 10 V power supply, as well as protection and monitoring circuits. The main power converter, with a maximum current rating of 1.5 A, is designed to equalize the voltage between neighbouring CPV cells by using the ¿-converter approach. Due to partial power processing, the converter's power rating and efficiency requirements are relaxed, leading to a more cost-effective solution with a high switching frequency of 3.6 MHz. An on-chip, mixed-signal controller regulates the main converter using a digital voltage loop and an analog hysteretic current-mode loop. The IC has several advanced features to reduce the light-load power consumption, including burst-mode operation in both the auxiliary and main-stage converters, as well as an input supply switching scheme for the internal linear voltage regulators.",

author = "M.S. Zaman and Y. Wen and R. Fernandes and B. Buter and T.S. Doorn and M. Dijkstra and H.J. Bergveld and O. Trescases",

year = "2014",

doi = "10.1109/ISPSD.2014.6856063",

language = "English",

isbn = "978-1-4799-2917-7",

pages = "410--413",

booktitle = "Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

note = "26th International Symposium on Power Semiconductor Devices and ICs (ISPSD '14), June 15-19, 2014, Waikoloa, HI, USA, ISPSD '14 ; Conference date: 15-06-2014 Through 19-06-2014",

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}

Zaman, MS, Wen, Y, Fernandes, R, Buter, B, Doorn, TS, Dijkstra, M, Bergveld, HJ & Trescases, O 2014, A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems. in Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA. Institute of Electrical and Electronics Engineers, Piscataway, pp. 410-413, 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD '14), June 15-19, 2014, Waikoloa, HI, USA, Waikoloa, HI, United States, 15/06/14. https://doi.org/10.1109/ISPSD.2014.6856063

A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems. / Zaman, M.S.; Wen, Y.; Fernandes, R. et al.
Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA. Piscataway: Institute of Electrical and Electronics Engineers, 2014. p. 410-413.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

TY - GEN

T1 - A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems

AU - Zaman, M.S.

AU - Wen, Y.

AU - Fernandes, R.

AU - Buter, B.

AU - Doorn, T.S.

AU - Dijkstra, M.

AU - Bergveld, H.J.

AU - Trescases, O.

PY - 2014

Y1 - 2014

N2 - This work presents a power management IC used to mitigate the effects of mismatch in Concentrating-Photovoltaic (CPV) systems. The IC contains a bi-directional dc-dc converter, an auxiliary boost converter to generate the internal 10 V power supply, as well as protection and monitoring circuits. The main power converter, with a maximum current rating of 1.5 A, is designed to equalize the voltage between neighbouring CPV cells by using the ¿-converter approach. Due to partial power processing, the converter's power rating and efficiency requirements are relaxed, leading to a more cost-effective solution with a high switching frequency of 3.6 MHz. An on-chip, mixed-signal controller regulates the main converter using a digital voltage loop and an analog hysteretic current-mode loop. The IC has several advanced features to reduce the light-load power consumption, including burst-mode operation in both the auxiliary and main-stage converters, as well as an input supply switching scheme for the internal linear voltage regulators.

AB - This work presents a power management IC used to mitigate the effects of mismatch in Concentrating-Photovoltaic (CPV) systems. The IC contains a bi-directional dc-dc converter, an auxiliary boost converter to generate the internal 10 V power supply, as well as protection and monitoring circuits. The main power converter, with a maximum current rating of 1.5 A, is designed to equalize the voltage between neighbouring CPV cells by using the ¿-converter approach. Due to partial power processing, the converter's power rating and efficiency requirements are relaxed, leading to a more cost-effective solution with a high switching frequency of 3.6 MHz. An on-chip, mixed-signal controller regulates the main converter using a digital voltage loop and an analog hysteretic current-mode loop. The IC has several advanced features to reduce the light-load power consumption, including burst-mode operation in both the auxiliary and main-stage converters, as well as an input supply switching scheme for the internal linear voltage regulators.

U2 - 10.1109/ISPSD.2014.6856063

DO - 10.1109/ISPSD.2014.6856063

M3 - Conference contribution

SN - 978-1-4799-2917-7

SP - 410

EP - 413

BT - Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA

PB - Institute of Electrical and Electronics Engineers

CY - Piscataway

T2 - 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD '14), June 15-19, 2014, Waikoloa, HI, USA

Y2 - 15 June 2014 through 19 June 2014

ER -

Zaman MS, Wen Y, Fernandes R, Buter B, Doorn TS, Dijkstra M et al. A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems. In Proceedings of the IEEE 26th International Symposium on Power Semiconductor Devices and ICs (ISPSD), 15-19 June 2014, Waikoloa, HI, USA. Piscataway: Institute of Electrical and Electronics Engineers. 2014. p. 410-413 doi: 10.1109/ISPSD.2014.6856063

A cell-level power management IC in BCD-SOI for partial power processing in Concentrating-PV systems

Abstract

Conference

UN SDGs

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