A Capacitor-DAC-Based Technique for Pre-Emphasis-Enabled Multilevel Transmitters

Boyu Hu; Yuan Du; Rulin Huang; Jeffrey Lee; Young-Kai Chen; Mau-Chung Frank Chang

doi:10.1109/TCSII.2016.2619623

A Capacitor-DAC-Based Technique for Pre-Emphasis-Enabled Multilevel Transmitters

Boyu Hu, Yuan Du, Rulin Huang, Jeffrey Lee, Young-Kai Chen, Mau-Chung Frank Chang

Research output: Contribution to journal › Article › Academic › peer-review

8 Citations (Scopus)

Abstract

This brief presents a capacitor digital-to-analog converter (DAC) based technique that is suitable for pre-emphasis-enabled multilevel wireline transmitter design in voltage mode. Detailed comparisons between the proposed technique and conventional direct-coupling-based as well as resistor-DAC-based multilevel transmitter design techniques are given, revealing potential benefits in terms of speed, linearity, implementation complexity, and also power consumption. A PAM-4 transmitter with 2-Tap feed-forward equalization adopting the proposed technique is implemented in 65-nm CMOS technology. It achieves a 25-Gb/s data rate and energy efficiency of 2 mW/Gb/s.

Original language	English
Article number	7600391
Pages (from-to)	1012-1016
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	64
Issue number	9
DOIs	https://doi.org/10.1109/TCSII.2016.2619623
Publication status	Published - Sept 2017
Externally published	Yes

Funding

Manuscript received September 21, 2016; revised October 3, 2016; accepted October 6, 2016. Date of publication October 19, 2016; date of current version August 25, 2017. This work was supported in part by the Office of the Director of National Intelligence and in part by the Intelligence Advanced Research Projects Activity via Sandia National Laboratories through the SPAWAR under Grant N66001-12-C-2011. This brief was recommended by Associate Editor F. Lau. VI. ACKNOWLEDGMENT The authors acknowledge the support of Dr. C. McCants and Dr. D. Polla with Intelligence Advanced Research Projects Activity (IARPA). The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of the Office of the Director of National Intelligence, IARPA, or the U.S. Government. The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright annotation thereon.

Keywords

Capacitor digital-to-analog converter (DAC)
PAM-4
pre-emphasis
transmitter
wireline

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/TCSII.2016.2619623

Cite this

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title = "A Capacitor-DAC-Based Technique for Pre-Emphasis-Enabled Multilevel Transmitters",

abstract = "This brief presents a capacitor digital-to-analog converter (DAC) based technique that is suitable for pre-emphasis-enabled multilevel wireline transmitter design in voltage mode. Detailed comparisons between the proposed technique and conventional direct-coupling-based as well as resistor-DAC-based multilevel transmitter design techniques are given, revealing potential benefits in terms of speed, linearity, implementation complexity, and also power consumption. A PAM-4 transmitter with 2-Tap feed-forward equalization adopting the proposed technique is implemented in 65-nm CMOS technology. It achieves a 25-Gb/s data rate and energy efficiency of 2 mW/Gb/s.",

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A Capacitor-DAC-Based Technique for Pre-Emphasis-Enabled Multilevel Transmitters

Abstract

Funding

Keywords

UN SDGs

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