A binary-to-thermometer decoder with built-in redundancy for improved DAC Yield

G.I. Radulov, P.J. Quinn, P.C.W. Beek, van, J.A. Hegt, A.H.M. Roermund, van

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Abstract

This paper describes a new architecture for binary-to-thermometer decoders used in segmented D/A converters. To improve basic converter characteristics, the architecture features redundant output thermometer code. The main concept offers two modes of operation. Each mode generates a different thermometer output, i.e. a different switching sequence for the DAC MSB thermometer analog elements. This results in two different transfer characteristics of the whole DAC for the same mismatch errors of its elements. After on-chip or off-chip measurements, the more linear transfer characteristic can be selected. In this way, chip yield is improved and the design requirements can be relaxed. Ultimately, the advantages introduced by the proposed decoder will lead to cheaper and smaller D/A Converters.
Original languageEnglish
Title of host publicationProceedings of the IEEE International Symposium on Circuits and Systems (ISCAS 2006) 21 - 24 May 2006, Island of Kos, Greece
Place of PublicationPiscataway, New Jersey, USA
PublisherInstitute of Electrical and Electronics Engineers
ISBN (Print)0-7803-9389-9
Publication statusPublished - 2006
Event2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006) - Kos International Convention Centre (KICC), Island of Kos, Greece
Duration: 21 May 200624 May 2006

Conference

Conference2006 IEEE International Symposium on Circuits and Systems (ISCAS 2006)
Abbreviated titleISCAS 2006
Country/TerritoryGreece
CityIsland of Kos
Period21/05/0624/05/06

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