Abstract
An ultra-low power wake-up receiver for wireless sensor network applications is presented. The 915MHz OOK receiver is based on the double-sampling RF power detector architecture. Together with an on-chip ADC, the receiver achieves -86dBm sensitivity at 10kbps, while consuming 123µW. Flexible sensitivity/data-rate/power consumption options are also possible. The receiver front-end is fabricated in a 90nm CMOS technology and wire-bonded in a QFN56 package
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 37th European Solid-State Circuits Conference (ESSCIRC '11), 12-16 September 2011, Helsinki, Finland |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 543-546 |
| ISBN (Print) | 978-1-4577-0703-2 |
| DOIs | |
| Publication status | Published - 2011 |
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