A 915MHz ulta-low power wake-up receiver with scalable performance and power consumption

X. Huang, P.J.A. Harpe, G. Dolmans, H.W.H. Groot, de

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

23 Citations (Scopus)
1 Downloads (Pure)

Abstract

An ultra-low power wake-up receiver for wireless sensor network applications is presented. The 915MHz OOK receiver is based on the double-sampling RF power detector architecture. Together with an on-chip ADC, the receiver achieves -86dBm sensitivity at 10kbps, while consuming 123µW. Flexible sensitivity/data-rate/power consumption options are also possible. The receiver front-end is fabricated in a 90nm CMOS technology and wire-bonded in a QFN56 package
Original languageEnglish
Title of host publicationProceedings of the 37th European Solid-State Circuits Conference (ESSCIRC '11), 12-16 September 2011, Helsinki, Finland
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages543-546
ISBN (Print)978-1-4577-0703-2
DOIs
Publication statusPublished - 2011

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    Huang, X., Harpe, P. J. A., Dolmans, G., & Groot, de, H. W. H. (2011). A 915MHz ulta-low power wake-up receiver with scalable performance and power consumption. In Proceedings of the 37th European Solid-State Circuits Conference (ESSCIRC '11), 12-16 September 2011, Helsinki, Finland (pp. 543-546). Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ESSCIRC.2011.6044942