A -81.6dBm sensitivity ultrasound transceiver in 65nm CMOS for symmetrical data-links

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Abstract

This paper presents the design and experimental characterization of an ultrasound transceiver. The transceiver includes an on-chip transmitter and a receiver to be used in a symmetric data-link, where each sensor node has limited energy resources and is operated in air or a fluidic environment. The receiver and the transmitter operate from a 0.8V supply and consume 1.18μW and 50μW, respectively, while exchanging data at 1kbps data-rate. The receiver sensitivity is -81.6dBm at a 10-3 Bit Error Rate (BER) level, which enables an experimentally verified transmission over 3.2m in air and a predicted transmission distance in water in the order of 2km, with a measured energy per bit performance of 51.18 nJ/b.

Original languageEnglish
Title of host publicationESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference
Place of PublicationPIscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages145-148
Number of pages4
ISBN (Electronic)978-1-7281-1550-4
DOIs
Publication statusPublished - Sep 2019
Event45th IEEE European Solid State Circuits Conference, ESSCIRC 2019 - Cracow, Poland
Duration: 23 Sep 201926 Sep 2019

Conference

Conference45th IEEE European Solid State Circuits Conference, ESSCIRC 2019
CountryPoland
CityCracow
Period23/09/1926/09/19

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Keywords

  • ultrasound communication, low power analog IC desıgn

Cite this

Berkol, G., Baltus, P. G. M., Harpe, P. J. A., & Cantatore, E. (2019). A -81.6dBm sensitivity ultrasound transceiver in 65nm CMOS for symmetrical data-links. In ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (pp. 145-148). [8902921] PIscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ESSCIRC.2019.8902921