Abstract
In this work, the design of an open-loop front-end track & hold (T&H) circuit is considered. Advantages of the presented circuit include low power-consumption, high-speed operation, simple reliable design, and ability to operate at low power-supplies. The major problem of open-loop circuits is their relatively poor linearity. In the presented design, high linearity is achieved by applying three linearization techniques: clock boosting (Abo and Gray, 1999), resistive source degeneration (Razavi, 2001), (Ouzounov et al., 2005) and cross-coupling (Ouzounov et al., 2005), (Voorman and Veenstra, 2000). As a result, a linearity corresponding to 10-bit accuracy is achieved. The final design in a 0.18mum CMOS process achieves an SFDR of 62 dB using a sample frequency of 500 MHz while consuming 15mW at a 1.8V power supply
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 24th IEEE Norchip 2006 Conference |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 103-106 |
| Number of pages | 4 |
| ISBN (Print) | 1-4244-0772-9 |
| DOIs | |
| Publication status | Published - 2006 |
| Event | IEEE Norchip 2006 - Linkoping, Sweden Duration: 20 Nov 2006 → 21 Nov 2006 |
Conference
| Conference | IEEE Norchip 2006 |
|---|---|
| Country | Sweden |
| City | Linkoping |
| Period | 20/11/06 → 21/11/06 |
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Cite this
Harpe, P. J. A., Zanikopoulos, A., Hegt, J. A., & Roermund, van, A. H. M. (2006). A 62dB SFDR, 500MSPS, 15mW open-loop track-and-hold circuit. In Proceedings of the 24th IEEE Norchip 2006 Conference (pp. 103-106). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/NORCHP.2006.329254