Abstract
| Original language | English |
|---|---|
| Title of host publication | IEEE RF IC Symposium, May 2009, Boston |
| Pages | 211-214 |
| Publication status | Published - 2009 |
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A 60GHz Digitally Controlled RF-Beamforming Receiver Front-end in 65nm CMOS. / Yu, Y.; Baltus, P.G.M.; Graauw, de, A.J.M.; Heijden, van der, E.; Collados, M.; Vaucher, C.S.; Roermund, van, A.H.M.
IEEE RF IC Symposium, May 2009, Boston. 2009. p. 211-214.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
TY - GEN
T1 - A 60GHz Digitally Controlled RF-Beamforming Receiver Front-end in 65nm CMOS
AU - Yu, Y.
AU - Baltus, P.G.M.
AU - Graauw, de, A.J.M.
AU - Heijden, van der, E.
AU - Collados, M.
AU - Vaucher, C.S.
AU - Roermund, van, A.H.M.
PY - 2009
Y1 - 2009
N2 - http://alexandria.tue.nl/campusonly/Metis223347.pdfPhased arrays form a crucial step towards high data rate 60GHz wireless communication. This paper presents a fully integrated digitally controlled 60GHz RF-beamforming receiver front-end in CMOS. Using digitally controlled active phase shifters, each path of the scalable architecture achieves 10dB power gain, 7.2dB noise figure, a 360º phase shift range in 22.5º steps at 61GHz, and a 3dB-bandwidth of 5.4GHz, while only dissipating 78mW in each path. Chip area is 1.6mm2.
AB - http://alexandria.tue.nl/campusonly/Metis223347.pdfPhased arrays form a crucial step towards high data rate 60GHz wireless communication. This paper presents a fully integrated digitally controlled 60GHz RF-beamforming receiver front-end in CMOS. Using digitally controlled active phase shifters, each path of the scalable architecture achieves 10dB power gain, 7.2dB noise figure, a 360º phase shift range in 22.5º steps at 61GHz, and a 3dB-bandwidth of 5.4GHz, while only dissipating 78mW in each path. Chip area is 1.6mm2.
M3 - Conference contribution
SN - 978-1-4244-3376-6
SP - 211
EP - 214
BT - IEEE RF IC Symposium, May 2009, Boston
ER -