A 60GHz Digitally Controlled RF-Beamforming Receiver Front-end in 65nm CMOS

Y. Yu, P.G.M. Baltus, A.J.M. Graauw, de, E. Heijden, van der, M. Collados, C.S. Vaucher, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

23 Citations (Scopus)

Abstract

http://alexandria.tue.nl/campusonly/Metis223347.pdfPhased arrays form a crucial step towards high data rate 60GHz wireless communication. This paper presents a fully integrated digitally controlled 60GHz RF-beamforming receiver front-end in CMOS. Using digitally controlled active phase shifters, each path of the scalable architecture achieves 10dB power gain, 7.2dB noise figure, a 360º phase shift range in 22.5º steps at 61GHz, and a 3dB-bandwidth of 5.4GHz, while only dissipating 78mW in each path. Chip area is 1.6mm2.
Original languageEnglish
Title of host publicationIEEE RF IC Symposium, May 2009, Boston
Pages211-214
Publication statusPublished - 2009

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    Yu, Y., Baltus, P. G. M., Graauw, de, A. J. M., Heijden, van der, E., Collados, M., Vaucher, C. S., & Roermund, van, A. H. M. (2009). A 60GHz Digitally Controlled RF-Beamforming Receiver Front-end in 65nm CMOS. In IEEE RF IC Symposium, May 2009, Boston (pp. 211-214)