A 60 GHz Down-conversion Passive Mixer in 65 nm CMOS Technology

Yang Liu; Yun Fang; Hao Gao

doi:10.1109/IWS52775.2021.9499438

A 60 GHz Down-conversion Passive Mixer in 65 nm CMOS Technology

Yang Liu
, Yun Fang
, Hao Gao

Integrated Circuits

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

4 Citations (Scopus)

1 Downloads (Pure)

Abstract

A passive down-conversion mixer in a 65nm buck CMOS process has been presented. The proposed mixer is consisted of a mixer-core and a folded OTA buffer. The mixer has a 3-dB bandwidth of 57~66 GHz, with a conversion gain of −2.7 ~ −5.4 dB. It requires a LO level of −5 dBm. The isolation between LO and RF ports is 10 dB. The total power consumption of the mixer is 1.4 mW, and the chip area is 0.4 mm 2 .

Original language	English
Title of host publication	2021 IEEE MTT-S International Wireless Symposium, IWS 2021 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers
Number of pages	3
ISBN (Electronic)	978-1-6654-3527-7
DOIs	https://doi.org/10.1109/IWS52775.2021.9499438
Publication status	Published - 10 Aug 2021
Event	2021 IEEE MTT-S International Wireless Symposium, IWS 2021 - ZOOM Conference, Nanjing, China Duration: 23 May 2021 → 26 May 2021

Conference

Conference	2021 IEEE MTT-S International Wireless Symposium, IWS 2021
Country/Territory	China
City	Nanjing
Period	23/05/21 → 26/05/21

Keywords

60 GHz
CMOS
Passive mixer

Access to Document

10.1109/IWS52775.2021.9499438

Cite this

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title = "A 60 GHz Down-conversion Passive Mixer in 65 nm CMOS Technology",

abstract = "A passive down-conversion mixer in a 65nm buck CMOS process has been presented. The proposed mixer is consisted of a mixer-core and a folded OTA buffer. The mixer has a 3-dB bandwidth of 57\textasciitilde{}66 GHz, with a conversion gain of −2.7 \textasciitilde{} −5.4 dB. It requires a LO level of −5 dBm. The isolation between LO and RF ports is 10 dB. The total power consumption of the mixer is 1.4 mW, and the chip area is 0.4 mm 2 .",

keywords = "60 GHz, CMOS, Passive mixer",

author = "Yang Liu and Yun Fang and Hao Gao",

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booktitle = "2021 IEEE MTT-S International Wireless Symposium, IWS 2021 - Proceedings",

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note = "2021 IEEE MTT-S International Wireless Symposium, IWS 2021 ; Conference date: 23-05-2021 Through 26-05-2021",

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T1 - A 60 GHz Down-conversion Passive Mixer in 65 nm CMOS Technology

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AU - Fang, Yun

AU - Gao, Hao

PY - 2021/8/10

Y1 - 2021/8/10

N2 - A passive down-conversion mixer in a 65nm buck CMOS process has been presented. The proposed mixer is consisted of a mixer-core and a folded OTA buffer. The mixer has a 3-dB bandwidth of 57~66 GHz, with a conversion gain of −2.7 ~ −5.4 dB. It requires a LO level of −5 dBm. The isolation between LO and RF ports is 10 dB. The total power consumption of the mixer is 1.4 mW, and the chip area is 0.4 mm 2 .

AB - A passive down-conversion mixer in a 65nm buck CMOS process has been presented. The proposed mixer is consisted of a mixer-core and a folded OTA buffer. The mixer has a 3-dB bandwidth of 57~66 GHz, with a conversion gain of −2.7 ~ −5.4 dB. It requires a LO level of −5 dBm. The isolation between LO and RF ports is 10 dB. The total power consumption of the mixer is 1.4 mW, and the chip area is 0.4 mm 2 .

KW - 60 GHz

KW - CMOS

KW - Passive mixer

UR - https://www.scopus.com/pages/publications/85124505551

U2 - 10.1109/IWS52775.2021.9499438

DO - 10.1109/IWS52775.2021.9499438

M3 - Conference contribution

BT - 2021 IEEE MTT-S International Wireless Symposium, IWS 2021 - Proceedings

PB - Institute of Electrical and Electronics Engineers

T2 - 2021 IEEE MTT-S International Wireless Symposium, IWS 2021

Y2 - 23 May 2021 through 26 May 2021

ER -

A 60 GHz Down-conversion Passive Mixer in 65 nm CMOS Technology

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Keywords

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