A 60-GHz double-balanced homodyne down-converter in 65-nm CMOS process

P. Sakian Dezfuli, R. Mahmoudi, Paul van Zeijl, M. Lont, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

10 Citations (Scopus)
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Abstract

A fully differential 60 GHz down-converter in 65-nm CMOS technology is presented. The circuit, including the buffers, draws 5 mA from a 1.2 V supply. The measured power conversion gain is 4 dB with an IF 3 dB bandwidth of 1.3 GHz. Measured IIP2 and IIP3 are 16.6 and -6 dBm respectively. The mixer will be part of a 60 GHz receiver.
Original languageEnglish
Title of host publicationMicrowave Integrated Circuits conference, 2009. EuMIC 2009. European, September 28-29-2009
Pages258-281
Publication statusPublished - 2009
Eventconference; IEEE EuMIC 2009, September 28-29 2009 -
Duration: 1 Jan 2009 → …

Conference

Conferenceconference; IEEE EuMIC 2009, September 28-29 2009
Period1/01/09 → …
OtherIEEE EuMIC 2009, September 28-29 2009

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    Sakian Dezfuli, P., Mahmoudi, R., van Zeijl, P., Lont, M., & Roermund, van, A. H. M. (2009). A 60-GHz double-balanced homodyne down-converter in 65-nm CMOS process. In Microwave Integrated Circuits conference, 2009. EuMIC 2009. European, September 28-29-2009 (pp. 258-281)