A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio

M. Ding; P.J.A. Harpe; J.A. Hegt; K.J.P. Philips; H.W.H. Groot, de; A.H.M. Roermund, van

doi:10.1109/RFIC.2012.6242328

A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio

M. Ding, P.J.A. Harpe, J.A. Hegt, K.J.P. Philips, H.W.H. Groot, de, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

6 Citations (Scopus)

Abstract

A 5bit 1GS/s 0.05mm2 4× time-interleaved asynchronous digital slope ADC in 90nm CMOS for IR UWB radio is presented. New delay cells are introduced to double the speed over prior art, yielding the 250MS/s single-channel slope converter. A self-disabled comparator eliminates static leakage and consumes only 0.25pJ/conversion. A single calibration circuit corrects both offset errors and mismatches in the new delay cells, achieving an ENOB of 4.85bit with 1.5GHz ERBW. This ADC consumes 2.7mW at a 1V supply, enabling a FoM of 93fJ/conversion-step. At 0.8V, it can work at 0.5GS/s. Even compared to the state-of-the-art of well-established architectures, it achieves similar power-efficiency.

Original language	English
Title of host publication	Proceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	487-490
DOIs	https://doi.org/10.1109/RFIC.2012.6242328
Publication status	Published - 2012
Event	2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2012) - Montréal, Canada Duration: 17 Jun 2012 → 19 Jun 2012

Conference

Conference	2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2012)
Abbreviated title	RFIC 2012
Country/Territory	Canada
City	Montréal
Period	17/06/12 → 19/06/12

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10.1109/RFIC.2012.6242328

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Ding, M., Harpe, P. J. A., Hegt, J. A., Philips, K. J. P., Groot, de, H. W. H., & Roermund, van, A. H. M. (2012). A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio. In Proceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada (pp. 487-490). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/RFIC.2012.6242328

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title = "A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio",

abstract = "A 5bit 1GS/s 0.05mm2 4× time-interleaved asynchronous digital slope ADC in 90nm CMOS for IR UWB radio is presented. New delay cells are introduced to double the speed over prior art, yielding the 250MS/s single-channel slope converter. A self-disabled comparator eliminates static leakage and consumes only 0.25pJ/conversion. A single calibration circuit corrects both offset errors and mismatches in the new delay cells, achieving an ENOB of 4.85bit with 1.5GHz ERBW. This ADC consumes 2.7mW at a 1V supply, enabling a FoM of 93fJ/conversion-step. At 0.8V, it can work at 0.5GS/s. Even compared to the state-of-the-art of well-established architectures, it achieves similar power-efficiency.",

author = "M. Ding and P.J.A. Harpe and J.A. Hegt and K.J.P. Philips and {Groot, de}, H.W.H. and {Roermund, van}, A.H.M.",

year = "2012",

doi = "10.1109/RFIC.2012.6242328",

language = "English",

pages = "487--490",

booktitle = "Proceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada",

publisher = "Institute of Electrical and Electronics Engineers",

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note = "2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2012), RFIC 2012 ; Conference date: 17-06-2012 Through 19-06-2012",

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Ding, M, Harpe, PJA , Hegt, JA, Philips, KJP, Groot, de, HWH & Roermund, van, AHM 2012, A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio. in Proceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada. Institute of Electrical and Electronics Engineers, Piscataway, pp. 487-490, 2012 IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2012), Montréal, Canada, 17/06/12. https://doi.org/10.1109/RFIC.2012.6242328

A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio. / Ding, M.; Harpe, P.J.A.; Hegt, J.A. et al.

Proceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada. Piscataway : Institute of Electrical and Electronics Engineers, 2012. p. 487-490.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AB - A 5bit 1GS/s 0.05mm2 4× time-interleaved asynchronous digital slope ADC in 90nm CMOS for IR UWB radio is presented. New delay cells are introduced to double the speed over prior art, yielding the 250MS/s single-channel slope converter. A self-disabled comparator eliminates static leakage and consumes only 0.25pJ/conversion. A single calibration circuit corrects both offset errors and mismatches in the new delay cells, achieving an ENOB of 4.85bit with 1.5GHz ERBW. This ADC consumes 2.7mW at a 1V supply, enabling a FoM of 93fJ/conversion-step. At 0.8V, it can work at 0.5GS/s. Even compared to the state-of-the-art of well-established architectures, it achieves similar power-efficiency.

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Ding M, Harpe PJA , Hegt JA, Philips KJP, Groot, de HWH, Roermund, van AHM. A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio. In Proceedings of the Radio Frequency Integrated Circuits Symposium (RFIC), 17 - 19 June 2012, Montreal, Canada. Piscataway: Institute of Electrical and Electronics Engineers. 2012. p. 487-490 doi: 10.1109/RFIC.2012.6242328

A 5bit 1GS/s 2.7mW 0.05mm^2 asynchronous digital slope ADC in 90nm CMOS for IR UWB radio

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