A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS

C. Zhou; P.J.A. Harpe; S. Rampu; Xiaoyan Wang; S. D'Amico; A. Baschirotto; K.J.P. Philips; G. Dolmans; H.W.H. Groot, de

doi:10.1109/VDAT.2010.5496699

A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS

C. Zhou, P.J.A. Harpe, S. Rampu, Xiaoyan Wang, S. D'Amico, A. Baschirotto, K.J.P. Philips, G. Dolmans, H.W.H. Groot, de

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

5 Citations (Scopus)

Abstract

This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56µW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal signal bandwidth is 5MHz. The performance is measured on a test-chip in a 90nm CMOS technology.

Original language	English
Title of host publication	Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan
Place of Publication	Piscataway
Publisher	Institute of Electrical and Electronics Engineers
Pages	91-94
ISBN (Print)	978-1-4244-5269-9
DOIs	https://doi.org/10.1109/VDAT.2010.5496699
Publication status	Published - 2010

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10.1109/VDAT.2010.5496699

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Zhou, C., Harpe, P. J. A., Rampu, S., Wang, X., D'Amico, S., Baschirotto, A., Philips, K. J. P., Dolmans, G., & Groot, de, H. W. H. (2010). A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS. In Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan (pp. 91-94). Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/VDAT.2010.5496699

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title = "A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS",

abstract = "This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56µW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal signal bandwidth is 5MHz. The performance is measured on a test-chip in a 90nm CMOS technology.",

author = "C. Zhou and P.J.A. Harpe and S. Rampu and Xiaoyan Wang and S. D'Amico and A. Baschirotto and K.J.P. Philips and G. Dolmans and {Groot, de}, H.W.H.",

year = "2010",

doi = "10.1109/VDAT.2010.5496699",

language = "English",

isbn = "978-1-4244-5269-9",

pages = "91--94",

booktitle = "Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan",

publisher = "Institute of Electrical and Electronics Engineers",

address = "United States",

}

Zhou, C, Harpe, PJA, Rampu, S, Wang, X, D'Amico, S, Baschirotto, A, Philips, KJP, Dolmans, G & Groot, de, HWH 2010, A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS. in Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan. Institute of Electrical and Electronics Engineers, Piscataway, pp. 91-94. https://doi.org/10.1109/VDAT.2010.5496699

A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS. / Zhou, C.; Harpe, P.J.A.; Rampu, S. et al.

Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan. Piscataway : Institute of Electrical and Electronics Engineers, 2010. p. 91-94.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

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AU - Harpe, P.J.A.

AU - Rampu, S.

AU - Wang, Xiaoyan

AU - D'Amico, S.

AU - Baschirotto, A.

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AU - Dolmans, G.

AU - Groot, de, H.W.H.

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N2 - This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56µW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal signal bandwidth is 5MHz. The performance is measured on a test-chip in a 90nm CMOS technology.

AB - This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56µW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal signal bandwidth is 5MHz. The performance is measured on a test-chip in a 90nm CMOS technology.

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DO - 10.1109/VDAT.2010.5496699

M3 - Conference contribution

SN - 978-1-4244-5269-9

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BT - Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan

PB - Institute of Electrical and Electronics Engineers

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Zhou C, Harpe PJA, Rampu S, Wang X, D'Amico S, Baschirotto A et al. A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS. In Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan. Piscataway: Institute of Electrical and Electronics Engineers. 2010. p. 91-94 https://doi.org/10.1109/VDAT.2010.5496699

A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS

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