Abstract
| Original language | English |
|---|---|
| Title of host publication | Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan |
| Place of Publication | Piscataway |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 91-94 |
| ISBN (Print) | 978-1-4244-5269-9 |
| DOIs | |
| Publication status | Published - 2010 |
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A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS. / Zhou, C.; Harpe, P.J.A.; Rampu, S.; Wang, Xiaoyan; D'Amico, S.; Baschirotto, A.; Philips, K.J.P.; Dolmans, G.; Groot, de, H.W.H.
Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan. Piscataway : Institute of Electrical and Electronics Engineers, 2010. p. 91-94.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review
TY - GEN
T1 - A 56uW VGA with 5MHz bandwidth and 47dB gain-range in 90nm CMOS
AU - Zhou, C.
AU - Harpe, P.J.A.
AU - Rampu, S.
AU - Wang, Xiaoyan
AU - D'Amico, S.
AU - Baschirotto, A.
AU - Philips, K.J.P.
AU - Dolmans, G.
AU - Groot, de, H.W.H.
PY - 2010
Y1 - 2010
N2 - This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56µW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal signal bandwidth is 5MHz. The performance is measured on a test-chip in a 90nm CMOS technology.
AB - This paper presents the design and implementation of a variable gain amplifier with an ultra low-power consumption of 56µW. This is achieved by using sub-threshold operation, 1V power supply and a minimum amount of current branches. After system-level optimization, a gain range of 47dB is implemented with 6dB per step programmability. The SNDR is better than 33dB for all gain settings, while the nominal signal bandwidth is 5MHz. The performance is measured on a test-chip in a 90nm CMOS technology.
U2 - 10.1109/VDAT.2010.5496699
DO - 10.1109/VDAT.2010.5496699
M3 - Conference contribution
SN - 978-1-4244-5269-9
SP - 91
EP - 94
BT - Proceedings of the 2010 International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 26-30 April 2010, Hsinchu, Taiwan
PB - Institute of Electrical and Electronics Engineers
CY - Piscataway
ER -