A 50–60 GHz mm-wave rectifier with bulk voltage bias in 65-nm CMOS

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Abstract

This letter presents a 50∼60 GHz fully integrated 3-stage rectifier with bulk voltage bias for threshold voltage modulation in a 65-nm CMOS technology, which can be integrated in a mm-wave hybrid rectifier structure as the main rectifier. In this letter, the new technique of bulk voltage bias is proposed and implemented. In this method, the threshold voltage of MOSFETs in the main rectifier is modulated by biasing their bulk voltage, which improves the rectifier sensitivity and efficiency. Compared to the inductor peaking method [1] or local threshold voltage modulation technique [2] in CMOS technology, the circuit proposed in this letter achieves better sensitivity and efficiency while maintaining a compact size. The work achieves −10 dBm input sensitivity at 52 GHz with 1 V DC output voltage. The maximum efficiency at 52 GHz is 13%. The overall sensitivity over the 50∼60 GHz band is better than −5 dBm.
Original languageEnglish
Pages (from-to)631 - 633
Number of pages3
JournalIEEE Microwave and Wireless Components Letters
Volume26
Issue number8
DOIs
Publication statusPublished - 26 Jul 2016

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rectifiers
Bias voltage
Threshold voltage
CMOS
threshold voltage
electric potential
Modulation
sensitivity
Electric potential
modulation
inductors
Networks (circuits)
field effect transistors
direct current
output

Cite this

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title = "A 50–60 GHz mm-wave rectifier with bulk voltage bias in 65-nm CMOS",
abstract = "This letter presents a 50∼60 GHz fully integrated 3-stage rectifier with bulk voltage bias for threshold voltage modulation in a 65-nm CMOS technology, which can be integrated in a mm-wave hybrid rectifier structure as the main rectifier. In this letter, the new technique of bulk voltage bias is proposed and implemented. In this method, the threshold voltage of MOSFETs in the main rectifier is modulated by biasing their bulk voltage, which improves the rectifier sensitivity and efficiency. Compared to the inductor peaking method [1] or local threshold voltage modulation technique [2] in CMOS technology, the circuit proposed in this letter achieves better sensitivity and efficiency while maintaining a compact size. The work achieves −10 dBm input sensitivity at 52 GHz with 1 V DC output voltage. The maximum efficiency at 52 GHz is 13{\%}. The overall sensitivity over the 50∼60 GHz band is better than −5 dBm.",
author = "H. Gao and M. Matters-Kammerer and P. Harpe and P. Baltus",
year = "2016",
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language = "English",
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journal = "IEEE Microwave and Wireless Components Letters",
issn = "1531-1309",
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A 50–60 GHz mm-wave rectifier with bulk voltage bias in 65-nm CMOS. / Gao, H.; Matters-Kammerer, M.; Harpe, P.; Baltus, P.

In: IEEE Microwave and Wireless Components Letters, Vol. 26, No. 8, 26.07.2016, p. 631 - 633 .

Research output: Contribution to journalArticleAcademicpeer-review

TY - JOUR

T1 - A 50–60 GHz mm-wave rectifier with bulk voltage bias in 65-nm CMOS

AU - Gao, H.

AU - Matters-Kammerer, M.

AU - Harpe, P.

AU - Baltus, P.

PY - 2016/7/26

Y1 - 2016/7/26

N2 - This letter presents a 50∼60 GHz fully integrated 3-stage rectifier with bulk voltage bias for threshold voltage modulation in a 65-nm CMOS technology, which can be integrated in a mm-wave hybrid rectifier structure as the main rectifier. In this letter, the new technique of bulk voltage bias is proposed and implemented. In this method, the threshold voltage of MOSFETs in the main rectifier is modulated by biasing their bulk voltage, which improves the rectifier sensitivity and efficiency. Compared to the inductor peaking method [1] or local threshold voltage modulation technique [2] in CMOS technology, the circuit proposed in this letter achieves better sensitivity and efficiency while maintaining a compact size. The work achieves −10 dBm input sensitivity at 52 GHz with 1 V DC output voltage. The maximum efficiency at 52 GHz is 13%. The overall sensitivity over the 50∼60 GHz band is better than −5 dBm.

AB - This letter presents a 50∼60 GHz fully integrated 3-stage rectifier with bulk voltage bias for threshold voltage modulation in a 65-nm CMOS technology, which can be integrated in a mm-wave hybrid rectifier structure as the main rectifier. In this letter, the new technique of bulk voltage bias is proposed and implemented. In this method, the threshold voltage of MOSFETs in the main rectifier is modulated by biasing their bulk voltage, which improves the rectifier sensitivity and efficiency. Compared to the inductor peaking method [1] or local threshold voltage modulation technique [2] in CMOS technology, the circuit proposed in this letter achieves better sensitivity and efficiency while maintaining a compact size. The work achieves −10 dBm input sensitivity at 52 GHz with 1 V DC output voltage. The maximum efficiency at 52 GHz is 13%. The overall sensitivity over the 50∼60 GHz band is better than −5 dBm.

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DO - 10.1109/LMWC.2016.2585552

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JO - IEEE Microwave and Wireless Components Letters

JF - IEEE Microwave and Wireless Components Letters

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