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A 4.4pJ/access 80MHz, 2K word x 64b memory with write masking feature and variability resilient multi-sized sense amplifier redundancy for wireless sensor nodes applications

  • Vibhu Sharma
  • , Stefan Cosemans
  • , Maryam Ashouei
  • , Jos Huisken
  • , Francky Catthoor
  • , Wim Dehaene

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Academic › peer-review

Abstract

A Variability resilient 128kbit 6T SRAM with energy consumption of 4.4pJ/access, operating at 80MHz for wireless sensor applications is developed in 90nm LP CMOS. The techniques developed include novelty in the local architecture with local read/write assist circuitry. VDD/2 pre-charged short local bit-lines with local sense amplifier enables charge re-cycling and gated read buffers eliminates bit-line leakage The multisized sense amplifier redundancy used for global sense amplifiers ensures variability resilient low energy consumption read operation.

Original languageEnglish
Title of host publicationESSCIRC 2010 - 36th European Solid State Circuits Conference
Pages358-361
Number of pages4
DOIs
Publication statusPublished - 27 Dec 2010
Externally publishedYes
Event36th European Solid State Circuits Conference (ESSCIRC 2010) - Sevilla, Spain
Duration: 14 Sept 2010 → 16 Sept 2010
Conference number: 36

Conference

Conference36th European Solid State Circuits Conference (ESSCIRC 2010)
Abbreviated titleESSIRC 2010
Country/TerritorySpain
CitySevilla
Period14/09/10 → 16/09/10

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

  1. SDG 7 - Affordable and Clean Energy
    SDG 7 Affordable and Clean Energy

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