A 40-GHz Phase-Locked Loop Front-End for 60-GHz Transceivers in 65nm CMOS

H.M. Cheema, R. Mahmoudi, A.H.M. Roermund, van

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Abstract

A phase-locked loop front-end including a LC voltage controlled oscillator and an I-Q injection locked frequency divider is presented. The operation ranges of the VCO and ILFD are aligned by co-designing the tank, specifically the tunable varactors. The total locking range of the front-end is 37.6 to 42.2 GHz which corresponds to a down-conversion range from 56.4 to 63.3 GHz at 60 GHz, thus covering the complete ISM band. The front-end phase noise for a VCO frequency of 39.8 GHz is -102 dBc/Hz at 1 MHz offset. The DC power consumption of the VCO and Q-ILFD is 6mW and 9mW from a 1.2 V supply, respectively. Implemented in a bulk CMOS 65nm technology, the circuit occupies an area of 0.7 × 0.5 mm2.
Original languageEnglish
Title of host publicationProceedings of 2010 IEEE Asia Pacific Conference on Circuits and Systems(APCCAS), 6-9 December 2010, Kuala Lumpur, Malaysia
Place of PublicationPiscataway
PublisherInstitute of Electrical and Electronics Engineers
Pages967-970
ISBN (Print)978-1-4244-7454-7
DOIs
Publication statusPublished - 2010

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    Cheema, H. M., Mahmoudi, R., & Roermund, van, A. H. M. (2010). A 40-GHz Phase-Locked Loop Front-End for 60-GHz Transceivers in 65nm CMOS. In Proceedings of 2010 IEEE Asia Pacific Conference on Circuits and Systems(APCCAS), 6-9 December 2010, Kuala Lumpur, Malaysia (pp. 967-970). Piscataway: Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/APCCAS.2010.5774963