A 30 GHz multiplexer with 500 MHz bandwidth for digital phased-array applications

W. Deng, F. Fortes, E. Heijden, van der, R. Mahmoudi, A.H.M. Roermund, van

Research output: Chapter in Book/Report/Conference proceedingConference contributionAcademicpeer-review

Abstract

This paper presents a fully integrated multiplexer operating at 30 GHz with 500 MHz bandwidth, in a 0.25um SiGe process to demonstrate a high frequency, high bandwidth solution for a time division multiplexing phased-array system. This multiplexer enables a four to one channel reduction by sequentially sampling between each RF channel. The measurement results show that it provides 33dB channel isolation, and -30dB (input) and -15dB (output) reflection coefficients regardless of the switch status. Meanwhile, to complete the system, a 4 GHz clock generator is also introduced to generate sequential control signals for the multiplexer. The measured system output spectrum shows a switched 30 GHz tone with 1 GHz sampling spacing and 25% duty-cycle, which matches the sampling theory and confirms that this design is suitable for high frequency, high bandwidth applications.
Original languageEnglish
Title of host publicationProceeding of EuMW 2009, European Microwave Week, 28 September - 2 October 2009, Rome, Italy
Pages1-4
Publication statusPublished - 2009

Fingerprint

Dive into the research topics of 'A 30 GHz multiplexer with 500 MHz bandwidth for digital phased-array applications'. Together they form a unique fingerprint.

Cite this